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EM78M612
Universal Serial Bus Microcontroller Series
This specification may change without further notice
.
2004/4/28 V1.1
13
R8 [0 ~ 7] Select which of the Port 6 pins are to be defined to wake-up the MCU from sleep
mode. When the state of the selected pins changes during sleep mode, the
MCU will wake-up and execute the next instruction automatically.
1: Disable the wake-up function
0: Enable the wake-up function
R9 (Port 7 Wake-up Pin Selection Register)
Default Value
:
(0B_1111_1111)
7
6
5
4
3
2
1
0
/Wu77
/Wu76
/Wu76
/Wu74
/Wu73
/Wu72
/Wu71
/Wu70
R9 [0 ~ 7] Select which of the Port 7 pins are to be defined to wake-up the MCU from sleep
mode. When the state of the selected pins changes during sleep mode, the
MCU will wake-up and execute the next instruction automatically.
1: Disable the wake-up function
0: Enable the wake-up function
RA (High Pattern Counter Register)
Default Value
:
(0B_0000_0000)
7
6
5
4
3
2
1
0
HP.7
HP.6
HP.5
HP.4
HP.3
HP.2
HP.1
HP.0
This register is used in pattern detecting application. If this function is disabled (IOCE[2] = 0),
the PDA function is disabled. RA register is also used as a general-purpose register.
RB (Low Pattern Counter Register)
Default Value
:
(0B_0000_0000)
7
6
5
4
3
2
1
0
LP.7
LP.6
LP.5
LP.4
LP.3
LP.2
LP.1
LP.0
This register is used in pattern detecting application. If this function is disabled (IOCE[2] = 0),
the PDA function is disabled. RB register is also used as a general-purpose register.
RC (USB Application Status Register)
Default Value
:
(0B_0000_0000)
7
6
5
4
3
2
1
0
EP0_W
EP0_R
EP1_R
0
Device_Resume
Host_Suspend
EP0_Busy Stall
RC [0]
Stall flag. When MCU receives an unsupported command or invalid parameters
from host, this bit will be set to 1 by the firmware to notify the UDC to return a
STALL handshake. When a successful SETUP transaction is received, this bit is
cleared automatically. This bit is both readable and writable.
RC [1]
EP0 Busy flag. When this bit is equal to “1,” it indicates that the UDC is writing
data into the EP0’FIFO or reading data from it. During this time, the firmware will
avoid accessing the FIFO until UDC finishes writing or reading. This bit is only
readable.