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| 型號(hào)： | EM6604SO24A |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 37/39頁 |
| 文件大?。?/td> | 675K |
| 代理商： | EM6604SO24A |
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EM6603
03/02 REV. G/439
Copyright
2002, EM Microelectronic-Marin SA
7
www.emmicroelectronic.com
3.3 Input port (PA0..PA3) RESET
With a mask option it is possible to choose from four PortA reset combinations. The selected ports must be
simultaneously high for at least 2ms/16ms (CLK = 32kHz) due to the presence of debouncers. Note also, that
RESET with port A is not possible during SLEEP mode.
Below are the combinations of Port A (PA0..PA3) inputs, which can be used to generate a RESET. They can be
selected by metal PortA RESET mask option, described in chapter 14.
Table 3. PortA Inputs RESET options (metal Hardware option)
Function
Opt. Code
Option A
no inputs RESET
RA0
Option B
RESET = PA0 * PA1
RA1
Option C
RESET = PA0 * PA1 * PA2
RA2
Option D
RESET = PA0 * PA1 * PA2 * PA3
RA3
3.4
Watchdog Timer RESET
The Watchdog Timer RESET is a software option and if used it will generate a RESET if it is not cleared. See
section 5. Watchdog timer for details.
Table 4. Watchdog-Timer Option (software option)
Watchdog Function
NoWD bit in Option register
Without Watchdog Time-out reset
1
With Watchdog Time-out reset
0
3.5 CPU State after RESET
RESET initialises the CPU as shown in the Table 5 below.
Table 5. Initial Value After RESET
name
bits
symbol
initial value
Program counter 0
12
PC0
$000 (as a result of Jump 0)
Program counter 1
12
PC1
undefined
Program counter 2
12
PC2
undefined
stack pointer
2
SP
SP(0) selected
index register
7
IX
undefined
Carry flag
1
CY
undefined
Zero flag
1
Z
undefined
HALT
1
HALT
0
Instruction register
16
IR
Jump 0
periphery registers
4
see peripheral memory map
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