參數(shù)資料
型號: EM6604SO24A
英文描述: Microcontroller
中文描述: 微控制器
文件頁數(shù): 32/39頁
文件大?。?/td> 675K
代理商: EM6604SO24A
EM6603
03/02 REV. G/439
Copyright
2002, EM Microelectronic-Marin SA
38
www.emmicroelectronic.com
date
Version
Chapter
(page)
old text
new text
27/8/99 C/242
All
B/151
C/242 new version in Doc. Control
27/8/99 C/242
(1)
2.0 to 5.5 V
Removed
2.0 to 5.5 V
27/8/99 C/242
(1)
Internal interrupt sources (timer,
event counter, prescaler)
Internal interrupt sources (timer, event
counter, prescaler, SWB)
27/8/99 C/242
(2)
4 external interrupt sources from
PortA
8 external interrupt sources: 4 from PortA
and 4 from PortC
27/8/99 C/242
(4)
For EM test purpose only
For EM test purpose only (internal pull-
down)
27/8/99 C/242
(4)
In Table1 Pin Number 22
Active high (internal pull-down)
27/8/99 C/242
(4)
In Table1 Pin Number 23
Needs typ. 100nF capacitor tw. Vss
27/8/99 C/242
2 (5)
Added at the bottom of the page
*registers are marked in bold and
underlined like IntRq
*Bits/Flags in registers are marked in bold
only like
SLEEP
27/8/99 C/242
All
New register and Bits/Flags marking
(see line above)
27/8/99 C/242
6 (9)
Pull-down
Pull-Up/Down
27/8/99 C/242
6 (9)
(option 2 on Fig 6 and Fig 8 )
(option 3 on Fig 6 and Fig 8 )
27/8/99 C/242
6.7 (14)
The input line can be pulled down
( ...
The input line can be pulled Up/Down ( ...
27/8/99 C/242
8.1 (17)
Fout / 0 / R/W / System freq. Output on
STB/RST pad
Added in Table 28. PA3 counter input …
27/8/99 C/242
9 (18)
IntTim and INTPR flags are
cleared ..
INTTE and INTPR flags are cleared …
27/8/99 C/242
11. (23:25)
New explanation of SWB to be as close as
possible to other EM66XX
(no functional change)
27/8/99 C/242
14 (27)
Column 2 & 3 in Table 40
Input/Output Ports
removedColumn 2 & 3 in Table 40
Input/Output Ports … and notes *3,*4,*5
27/8/99 C/242
15 (28)
Fout / Frequency selector on STB/RST
Added in Register PA3cnt
27/8/99 C/242
16.1 (30)
Max. Supply voltage +5.5V
Max. Supply voltage +3.6V
27/8/99 C/242
16.7 (33)
Qin to Qout impedance on PCB
min 5 M
, typ 10 M
27/8/99 C/242
17 (34)
17 Package and ordering
information
New chapter: 17 Pad location diagram.
New Figure 15.
27/8/99 C/242
18 (34,35)
18 Package and ordering information
New figure 16, 17, 18
27/8/99 C/242
18.1 (36)
18.1 CHIP marking – new description
27/8/99 C/242
18.2 (36)
18.2 CUSTOMER marking – new
27/8/99 C/242
18.3 (36)
18.3 ORDERING information – new
27/8/99 C/242
19 (37,38)
19 Spec Update - new
21/6/00 D/295
34
VddCA, Vbat (in Figure 15.)
Vreg, VDD
21/6/00 D/295
34
(in Figure 15.)
SUBSTRATE of the DIE is at VSS
21/6/00 D/295
16 (30,31)
IVDDa, IVDDh, IVDDs Max. over
temperature change in 16.4 DC
characteristics.
16.4. DC Characteristics - Power Supply
Pins - new values for IVDDa, IVDDh,
IVDDs Max. + 2 graphs IDDrun = f(T) and
IDDhalt = f(T).
19.09.01 E/374 13 (26)
New testloop
19.09.01 E/374 16.4 (30)
IVDDa, IVDDh, IVDDs Max. over
temperature change in 16.4 DC
characteristics.
16.4 DC Characteristics - Power Supply
Pins - new values for IVDDa, IVDDh,
IVDDs Max.
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