參數(shù)資料
型號: EM6604DL24A
英文描述: Microcontroller
中文描述: 微控制器
文件頁數(shù): 31/39頁
文件大?。?/td> 675K
代理商: EM6604DL24A
EM6603
03/02 REV. G/439
Copyright
2002, EM Microelectronic-Marin SA
37
www.emmicroelectronic.com
SPECIFICATION change
date
Version
Chapter
(page)
old text
new text
9/11/99 ver.2.2 All
New specifications (paper format only)
27/6/97 B/151
All
Version 2.2
B/151 new version in Doc Control
27/6/97 B/151
All
New pagination & new table nb.
27/6/97 B/151
(1,2)
16.4(30,31)
typical 2.7
A active mode
typical 0.3
A standby mode
typical 1.8
A active mode
typical 0.35
A standby mode
27/6/97 B/151
(4)
2 (5)
For Vdd less then 1.4V it is recommended
that Vdd is connected directly to Vreg
For Vdd>1.8V then the configuration
shown in Fig.3 should be used.
27/6/97 B/151
6 (9)
Table 10 option register – Option
new table and text describing option
register
27/6/97 B/151
6.4 (11)
below Figure 7. PortB new explanation of
mask options
27/6/97 B/151
6.6 (13)
below Figure 8. PortC new explanation of
mask options
27/6/97 B/151
8 (16)
First paragraph changed due to new
counter feature added – PA3 clk source
(debounced or not, Rising/Falling)
27/6/97 B/151
8 (16)
PA3 input terminal
PA3 input terminal (see tables 28 and 29)
added in Table 24. Timer clock selection
27/6/97 B/151
8.1 (17)
Table 28 PA3 counter input selection –
PA3cnt
Table 29 PA3 counter input selection
new tables describing PA3cnt register
Figure 10 Timer/Event Counter adapted
27/6/97 B/151
9.1 (19)
new description below Figure 11 Interrupt
Request generation
27/6/97 B/151
10 (20)
new formulation and more precise
explanation of SVLD (no functional
change)
27/6/97 B/151
11 (22)
Figure 12. Serail write buffer
1024 Hz input added in MUX
27/6/97 B/151
11.1 (23)
New explanation of SWB concerning
length and IRQ
27/6/97 B/151
11.2 (25)
New explanation of SWB in interactive
mode
27/6/97 B/151
14 (27)
New explanation of Metal mask options
below Table 40 Input/output Ports
27/6/97 B/151
14 (27)
Table 39 Watchdog metal option
Removed (software controlled)
27/6/97 B/151
15 (28)
New register PA3cnt at address 65 hex
27/6/97 B/151
16.2 (30)
VDD
VDD_range 1 / +1.4 ..+3.6V
VDD_range 2 (Vreg=VDD) / +1.2 ..+1.8V
27/6/97 B/151
16.2 (30)
VDD
VDD_range 1 / +1.4 ..+3.6V
VDD_range 2 (Vreg=VDD) / +1.2 ..+1.8V
27/6/97 B/151
16.5 (31)
VOL = f(IOL ,Vdd),
VOH = f(IOH ,Vdd),
New way of specifying
IOL = f(VOL ,Vdd), IOH = f(VOH ,Vdd),
27/6/97 B/151
16.5 (32)
Input Pull-Up/Down resistor
expressed by currents
New way of specifying Resistors
[k
] instead with currents
27/6/97 B/151
16.6 (32)
Absolute SVLD levels
2.50V, 2.00V, 1.25V
New relative way of specifying SVLD
precision and range for 3 levels
± x%
27/6/97 B/151
16.7 (33)
Max CQin
8.5 pf
Max CQout 15.9 pf
Max CQin
10.0 pf
Max CQout 20.0 pf
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