參數(shù)資料
型號(hào): EDE5108AHSE-6E-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 64M X 8 DDR DRAM, 0.45 ns, PBGA60
封裝: ROHS COMPLIANT, FBGA-60
文件頁(yè)數(shù): 26/64頁(yè)
文件大?。?/td> 871K
代理商: EDE5108AHSE-6E-E
Datasheet
DD2.x
PowerPC 750CL Microprocessor
Preliminary
Dimensions and Signal Assignments
Page 32 of 65
750cl_ds_body.fm.2.4
May 29, 2007
Figure 4-2. Package Drawing (Top View)
17.00
Notes:
1 The terminal A1 corner must be identified on the top surface of the package by using a corner chamfer,
ink, laser or metallized markings, indentation, or other feature of package body. A distinguishing feature
is allowable on the bottom surface of the package to identify the terminal A1 corner.
2 Package conforms to JEDEC Design standard MS-034.
Terminal A1 Corner Index
1
15.00
17.00
15.0
0
Top View
4x
R 0.5
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