參數(shù)資料
型號: EDD5108AFTA-6B-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 512M bits DDR SDRAM
中文描述: 64M X 8 DDR DRAM, 0.7 ns, PDSO66
封裝: ROHS COMPLIANT, PLASTIC, TSOP2-66
文件頁數(shù): 38/48頁
文件大?。?/td> 558K
代理商: EDD5108AFTA-6B-E
EDD5108AFTA-5, EDD5116AFTA-5
Data Sheet E0741E20 (Ver. 2.0)
38
DM Control
DM can mask input data. In
×
16 products, UDM and LDM can mask the upper and lower byte of input data
respectively. By setting DM to Low, data can be written. When DM is set to High, the corresponding data is not
written, and the previous data is held. The latency between DM input and enabling/disabling mask function is 0.
Mask
Mask
DQS
DQ
DM
t1
t2
t3
t4
t5
t6
Write mask latency = 0
DM Control
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