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參數(shù)資料
| 型號： | EDD5104ADTA-7BL-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | AML22 Series, Electronic Control Pushbutton, Square, Standard Bezel, Lighted, 1 LED, DPDT, Momentary Action, Snap in panel mount |
| 中文描述： | 128M X 4 DDR DRAM, 0.75 ns, PDSO66 |
| 封裝： | LEAD FREE, PLASTIC, TSOP2-66 |
| 文件頁數(shù)： | 27/49頁 |
| 文件大?。?/td> | 568K |
| 代理商： | EDD5104ADTA-7BL-E |
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EDD5104ADTA-E, EDD5108ADTA-E, EDD5116ADTA-E
Preliminary Data Sheet E0501E10 (Ver. 1.0)
27
Command Intervals
A Read command to the consecutive Read command Interval
Destination row of the
consecutive read command
Bank
address
Row address State
Operation
1. Same
Same
ACTIVE
The consecutive read can be performed after an interval of no less than 1 cycle to
interrupt the preceding read operation.
Precharge the bank to interrupt the preceding read operation. tRP after the
precharge command, issue the ACT command. tRCD after the ACT command, the
consecutive read command can be issued. See ‘A read command to the
consecutive precharge interval’ section.
The consecutive read can be performed after an interval of no less than 1 cycle to
interrupt the preceding read operation.
Precharge the bank without interrupting the preceding read operation. tRP after
the precharge command, issue the ACT command. tRCD after the ACT command,
the consecutive read command can be issued.
2. Same
Different
—
3. Different
Any
ACTIVE
IDLE
out
A0
out
A1
out
B0
out
B1
out
B2
out
B3
CK
/CK
Address
BA
DQ
DQS
Command
t0
t4
t5
t6
t7
t8
t9
t3
Bank0
Active
CL = 2
BL = 4
Bank0
NOP
ACT
NOP
READ
Row
Column A
READ
Column B
Column = A
Read
Column = B
Read
Column = A
Dout
Column = B
Dout
READ to READ Command Interval (same ROW address in the same bank)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EDD5104ADTA-7A | 512M bits DDR SDRAM |
| EDD5104ADTA-7A-E | 512M bits DDR SDRAM |
| EDD5104ADTA-7AL | 512M bits DDR SDRAM |
| EDD5104ADTA-7B | 512M bits DDR SDRAM |
| EDD5104ADTA-7B-E | 512M bits DDR SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDD5104ADTA-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM |
| EDD5108ABTA | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM |
| EDD5108ABTA-6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM |
| EDD5108ABTA-7A | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM |
| EDD5108ABTA-7B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM |
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