參數(shù)資料
型號(hào)： E28F320J3A-110
廠商： INTEL CORP
元件分類(lèi)： PROM
英文描述： 3 Volt Intel StrataFlash⑩ Memory
中文描述： 2M X 16 FLASH 2.7V PROM, 110 ns, PDSO56
封裝： 14 X 20 MM, TSOP-56
文件頁(yè)數(shù)： 25/58頁(yè)
文件大小： 380K
代理商： E28F320J3A-110
28F128J3A, 28F640J3A, 28F320J3A
Preliminary
19
NOTE:
1. The variable P is a pointer which is defined at CFI offset 15h.
NOTE:
1. The variable P is a pointer which is defined at CFI offset 15h.
4.3
Read Identifier Codes Command
The identifier code operation is initiated by writing the Read Identifier Codes command. Following
the command write, read cycles from addresses shown in
Figure 5 on page 10
retrieve the
manufacturer, device and block lock configuration codes (see
Table 15
for identifier code values).
Page-mode reads are not supported in this read mode. To terminate the operation, write another
valid command. Like the Read Array command, the Read Identifier Codes command functions
independently of the V
PEN
voltage. This command is valid only when the WSM is off or the device
is suspended. Following the Read Identifier Codes command, the following information can be
read:
Table 13. Protection Register Information
Offset
(1)
P = 31h
Length
Description
(Optional Flash Features and Commands)
Number of Protection register fields in JEDEC ID space.
“
00h,
”
indicates that 256 protection bytes are available
Protection Field 1: Protection Description
This field describes user-available One Time Programmable
(OTP) protection register bytes. Some are pre-programmed
with device-unique serial numbers. Others are user-
programmable. Bits 0-15 point to the protection register lock
byte, the section
’
s first byte. The following bytes are factory
pre-programmed and user-programmable.
bits 0-7 = Lock/bytes JEDEC-plane physical low address
bits 8-15 = Lock/bytes JEDEC-plane physical high address
bits 16-23 =
“
n
”
such that 2
= factory pre-programmed bytes
bits 24-31 =
“
n
”
such that 2
n
= user-programmable bytes
Add.
Hex
Code
Value
(P+E)h
1
3F:
--01
01
(P+F)h
(P+10)h
(P+11)h
(P+12)h
4
40:
--00
00h
Table 14. Burst Read Information
Offset
(1)
P = 31h
Length
Description
(Optional Flash Features and Commands)
Page Mode Read capability
bits 0
–
7 =
“
n
”
such that 2
n
HEX value represents the number
of read-page bytes. See offset 28h for device word width to
determine page-mode data output width. 00h indicates no
read page buffer.
Number of synchronous mode read configuration fields that
follow. 00h indicates no burst capability.
Reserved for future use
Add.
Hex
Code
Value
(P+13)h
1
44:
--03
8 byte
(P+14)h
1
45:
--00
0
(P+15)h
46:
相關(guān)PDF資料
PDF描述
E28F320J3A-115 Intel StrataFlash Memory (J3)
E28F320J3A-120 Intel StrataFlash Memory (J3)
E28F320J3A-125 Intel StrataFlash Memory (J3)
E28F320J3A-150 Intel StrataFlash Memory (J3)
E28F320J3C-115 Intel StrataFlash Memory (J3)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
E28F320J3A110SL5FS 功能描述:IC FLASH 32MBIT 110NS 56TSOP RoHS:否 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:150 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類(lèi)型:EEPROM 存儲(chǔ)容量:4K (2 x 256 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-VFDFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:8-DFN（2x3） 包裝:管件 產(chǎn)品目錄頁(yè)面:1445 (CN2011-ZH PDF)
E28F320J3A-115 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Intel StrataFlash Memory (J3)
E28F320J3A-120 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Intel StrataFlash Memory (J3)
E28F320J3A-125 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Intel StrataFlash Memory (J3)
E28F320J3A-150 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Intel StrataFlash Memory (J3)
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