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參數(shù)資料
| 型號： | DS12R885S-5+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 6/23頁 |
| 文件大小： | 0K |
| 描述： | IC RTC W/RAM 128 BYTE 24-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 時鐘/日歷 |
| 特點(diǎn)： | 警報器，閏年，NVSRAM，方波輸出，涓流充電器 |
| 存儲容量： | 114B |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | 并聯(lián) |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 電壓 - 電源，電池： | 2 V ~ 3.05 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 帶卷 (TR) |
DS12R885/DS12CR887/DS12R887
RTCs with Constant-Voltage Trickle Charger
14
Maxim Integrated
methods of avoiding any possible incorrect time and
calendar reads are covered later in this text.
The three alarm bytes can be used in two ways. First,
when the alarm time is written in the appropriate hours,
minutes, and seconds alarm locations, the alarm inter-
rupt is initiated at the specified time each day, if the
alarm-enable bit is high. In this mode, the “0” bits in the
alarm registers and the corresponding time registers
must always be written to 0 (Table 2A and 2B). Writing
the 0 bits in the alarm and/or time registers to 1 can
result in undefined operation.
The second use condition is to insert a “don’t care”
state in one or more of the three alarm bytes. The don’t-
care code is any hexadecimal value from C0 to FF. The
two most significant bits of each byte set the don’t-care
condition when at logic 1. An alarm is generated each
hour when the don’t-care bits are set in the hours byte.
Similarly, an alarm is generated every minute with
don’t-care codes in the hours and minute alarm bytes.
The don’t-care codes in all three alarm bytes create an
interrupt every second.
All 128 bytes can be directly written or read, except for
the following:
1) Registers C and D are read-only.
2) Bit 7 of register A is read-only.
3) The MSB of the seconds byte is read-only.
Table 2A. Time, Calendar, and Alarm Data Modes—BCD Mode (DM = 0)
ADDRESS
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
FUNCTION
RANGE
00H
0
10 Seconds
Seconds
00–59
01H
0
10 Seconds
Seconds
Seconds Alarm
00–59
02H
0
10 Minutes
Minutes
00–59
03H
0
10 Minutes
Minutes
Minutes Alarm
00–59
AM/PM
0
10 Hours
04H
0
10 Hours
Hours
1–12 +AM/PM
00–23
AM/PM
0
10 Hours
05H
0
10 Hours
Hours
Hours Alarm
1–12 +AM/PM
00–23
06H
0
Day
01–07
07H
0
10 Date
Date
01–31
08H
0
10 Months
Month
01–12
09H
10 Years
Year
00–99
0AH
UIP
DV2
DV1
DV0
RS3
RS2
RS1
RS0
Control
—
0BH
SET
PIE
AIE
UIE
SQWE
DM
24/12
DSE
Control
—
0CH
IRQF
PF
AF
UF
0
Control
—
0DH
VRT
0
Control
—
0EH-7F
X
RAM
—
X = Read/Write Bit.
Note: Unless otherwise specified, the state of the registers is not defined when power is first applied. Except for the seconds regis-
ter, 0 bits in the time and date registers can be written to 1, but may be modified when the clock updates. 0 bits should always be
written to 0 except for alarm mask bits.
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