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參數(shù)資料
| 型號： | DM9334N |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-Bit Addressable Latch |
| 中文描述： | 93 SERIES, LOW LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, DIP-16 |
| 文件頁數(shù)： | 4/5頁 |
| 文件大?。?/td> | 65K |
| 代理商： | DM9334N |
www.fairchildsemi.com
4
D
Switching Characteristics
at V
CC
=
5V and T
A
=
25
°
C
Switching Time Waveforms
Other Conditions: C
=
H, A
=
Stable
FIGURE 1.
Other Conditions: E
=
L, C
=
L, D
=
H
FIGURE 2.
Other Conditions: E
=
H
FIGURE 3.
Other Conditions: E
=
L, C
=
H, A
=
Stable
FIGURE 4.
Other Conditions: C
=
H, A
=
Stable
FIGURE 5.
Other Conditions: C
=
H
Note:
The shaded areas indicate when the inputs are permitted to change
for predictable output performance.
FIGURE 6.
Symbol
Parameter
From (Input)
R
L
=
400
, C
L
=
15 pF
Min
Units
To (Output)
Enable to Output,
(Figure 1)
Enable to Output,
Max
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
28
ns
t
PHL
27
ns
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
(Figure 1)
Data to Output,
(Figure 4)
t
PLH
35
ns
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
Data to Output,
(Figure 4)
Address to Output,
28
ns
t
PLH
35
ns
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
(Figure 2)
Address to Output,
(Figure 2)
t
PHL
35
ns
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
Clear to Output,
(Figure 3)
31
ns
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DM9334W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Addressable D-Type Latch |
| DM9338 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| DM9338 WAF | 制造商:Texas Instruments 功能描述: |
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| DM9338N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit Multiple Port Register |
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