參數(shù)資料
型號(hào): CY7C341B-35JC
英文描述: UV-Erasable/OTP Complex PLD
中文描述: UV-Erasable/OTP復(fù)雜可編程邏輯器件
文件頁(yè)數(shù): 4/12頁(yè)
文件大?。?/td> 858K
代理商: CY7C341B-35JC
相關(guān)PDF資料
PDF描述
CY7C341B-35JI
CY7C341B-35RC UV-Erasable/OTP Complex PLD
CY7C341B-35RI UV-Erasable/OTP Complex PLD
CY7C341B-35RMB UV-Erasable/OTP Complex PLD
CY7C342-25HI UV-Erasable/OTP Complex PLD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C341B-35JI 制造商:Cypress Semiconductor 功能描述:CPLD MAX 制造商:QP Semiconductor 功能描述:7C341B CYP DIE 35NS-PLCC
CY7C341B-35RI 制造商:Cypress Semiconductor 功能描述:CPLD MAX? Family 3.75K Gates 192 Macro Cells 33.3MHz 0.65um Technology 5V 84-Pin Windowed PGA
CY7C342-25HC 制造商:Cypress Semiconductor 功能描述:CMOS EPLD SMD 7C342 PLCC68 5V
CY7C342-30HC 制造商:Cypress Semiconductor 功能描述: 制造商:Cypress Semiconductor 功能描述:Complex Erasable Programmable Logic Device, 128 Cell, 30ns, 68 Pin, Ceramic, PLCC
CY7C34235HMB 制造商:CYPRESS 功能描述:New