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參數(shù)資料
| 型號： | CY7C1306BV25 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 18-Mbit Burst of 2 Pipelined SRAM with QDR Architecture(18Mbit，Burst of 2，QDR結(jié)構(gòu)，流水線SRAM) |
| 中文描述： | 18兆位的2四年防務(wù)審查架構(gòu)（18Mbit，2突發(fā)流水線SRAM的突發(fā)，國防評估報(bào)告結(jié)構(gòu)，流水線的SRAM） |
| 文件頁數(shù)： | 15/19頁 |
| 文件大?。?/td> | 821K |
| 代理商： | CY7C1306BV25 |
CY7C1306BV25
CY7C1303BV25
Document #: 38-05627 Rev. *A
Page 15 of 19
Maximum Ratings
(Above which the useful life may be impaired.)
Storage Temperature ................................–65°C to + 150°C
Ambient Temperature with
Power Applied............................................–55°C to + 125°C
Supply Voltage on V
DD
Relative to GND.......–0.5V to + 3.6V
Supply Voltage on V
DDQ
Relative to GND .....–0.5V to + V
DD
DC Applied to Outputs in
High-Z State........................................ –0.5V to V
DDQ
+ 0.5V
DC Input Voltage
[17]
...............................–0.5V to V
DD
+ 0.5V
Current into Outputs (LOW).........................................20 mA
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current.................................................... > 200 mA
Operating Range
Range
Com’l
Ind’l
Ambient
Temperature (T
A
)
0°C to + 70°C
–40°C to + 85°C
V
DD
[13]
2.5 ± 0.1V
V
DDQ
[13]
1.4V to 1.9V
Electrical Characteristics
Over the Operating Range
[14]
DC Electrical Characteristics
Over the Operating Range
Parameter
V
DD
V
DDQ
V
OH
V
OL
V
OH(LOW)
V
OL(LOW)
V
IH
V
IL
V
REF
I
X
I
OZ
I
DD
Description
Test Conditions
Min.
2.4
1.4
Typ.
2.5
1.5
Max.
2.6
1.9
Unit
V
V
V
V
V
V
V
V
V
μ
A
μ
A
mA
Power Supply Voltage
I/O Supply Voltage
Output HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
[17]
Input LOW Voltage
[17, 18]
Input Reference Voltage
[19]
Typical value = 0.75V
Input Leakage Current
Output Leakage Current
V
DD
Operating Supply
Note 15
Note 16
I
OH
= –0.1 mA, Nominal Impedance
I
OL
= 0.1 mA, Nominal Impedance
V
DDQ
/2 – 0.12
V
DDQ
/2
– 0.12
V
DDQ
– 0.2
V
SS
V
REF
+ 0.1
–0.3
0.68
–5
–5
V
DDQ
/2 + 0.12
V
DDQ
/2 + 0.12
V
DDQ
0.2
V
DDQ
+ 0.3
V
REF
– 0.1
0.95
5
5
500
0.75
GND
≤
V
I
≤
V
DDQ
GND
≤
V
I
≤
V
DDQ,
Output Disabled
V
DD
= Max., I
OUT
= 0 mA,
f = f
MAX
= 1/t
CYC
Max. V
DD
, Both Ports Deselected,
V
IN
≥
V
IH
or V
IN
≤
V
IL
f = f
MAX
=1/t
CYC,
Inputs Static
I
SB1
Automatic
Power-Down
Current
240
mA
AC Input Requirements
Over the Operating Range
Parameter
Description
V
IH
Input HIGH Voltage
V
IL
Input LOW Voltage
Test Conditions
Min.
Typ.
–
–
Max.
–
Unit
V
V
V
REF
+ 0.2
–
V
REF
– 0.2
Thermal Resistance
[20]
Parameter
Θ
JA
Description
Test Conditions
165 FBGA Package
16.7
Unit
°
C/W
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Test conditions follow standard test methods and
procedures for measuring thermal impedance,
per EIA/JESD51.
Θ
JC
6.5
°
C/W
Notes:
13.Power-up: Assumes a linear ramp from 0V to V
DD
(min.) within 200 ms. During this time V
IH
< V
DD
and V
DDQ
< V
DD
.
14.All Voltage referenced to Ground.
15.Output are impedance controlled. I
OH
= –V
DDQ
/2)/(RQ/5) for values of 175
<= RQ <= 350
.
16.Output are impedance controlled. I
= (V
/2)/(RQ/5) for values of 175
<= RQ <= 350
.
17.Overshoot: V
(AC) < V
+0.85V (Pulse width less than t
/2), Undershoot: V
IL
(AC) > –1.5V (Pulse width less than t
CYC
/2).
18.This spec is for all inputs except C and C Clock. For C and C Clock, V
(Max.) = V
REF
– 0.2V.
19.V
(Min.) = 0.68V or 0.46V
, whichever is larger, V
(Max.) = 0.95V or 0.54V
, whichever is smaller.
20.Tested initially and after any design or process change that may affect these parameters.
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