參數(shù)資料
型號: CY3687
廠商: Cypress Semiconductor Corp.
英文描述: MoBL-USB⑩ FX2LP18 USB Microcontroller
中文描述: 的MoBL - USB FX2LP18的USB微控制器⑩
文件頁數(shù): 6/39頁
文件大?。?/td> 453K
代理商: CY3687
CY7C68053
Document # 001-06120 Rev *H
Page 6 of 39
CTL0-2. If tri-stated via GPIFIDLECTL, these pins must be
pulled to V
CC_IO
or GND or driven by another chip.
RESET#, WAKEUP#. These pins must be pulled to V
CC_IO
or
GND or driven by another chip during suspend.
3.10 Program/Data RAM
This section describes the FX2LP18 RAM.
3.10.1 Size
The FX2LP18 has 16 kBytes of internal program/data RAM. No
USB control registers appear in this space.
Memory maps are shown in
Figure 3
and
Figure 4
.
3.10.2 Internal Code Memory
This mode implements the internal 16-kByte block of RAM
(starting at 0) as combined code and data memory. Only the
internal
16 kBytes and
scratch pad
0.5 kBytes RAM spaces
have the following access:
USB download
USB upload
Setup data pointer
I
2
C interface boot load
3.11 Register Addresses
3.12 Endpoint RAM
This section describes the FX2LP18 Endpoint RAM.
3.12.1 Size
3 × 64 bytes (Endpoints 0, 1)
8 × 512 bytes (Endpoints 2, 4, 6, 8)
3.12.2 Organization
EP0
Bidirectional endpoint zero, 64-byte buffer
EP1IN, EP1OUT
64-byte buffers: bulk or interrupt
EP2, 4, 6, 8
Eight 512-byte buffers: bulk, interrupt, or isochronous. EP4 and
EP8 can be double buffered, while EP2 and 6 can be double,
triple, or quad buffered. For high-speed endpoint configuration
options, see
Figure 5
on page 7.
3.12.3 Setup Data Buffer
A separate 8-byte buffer at 0xE6B8-0xE6BF holds the setup data
from a CONTROL transfer.
Figure 3. FX2LP18 Internal Code Memory
7.5 kBytes
USB regs and
4K FIFO buffers
0.5 kBytes RAM
Data
.
16 kBytes RAM
Code and Data
FFFF
E200
E000
3FFF
0000
.
.
FFFF
E800
E7FF
E7C0
E7BF
E780
E77F
E740
E73F
E700
E6FF
E500
E4FF
E480
E47F
E400
E3FF
E200
E1FF
E000
EFFF
2 kBytes RESERVED
64 Bytes EP0 IN/OUT
64 Bytes RESERVED
8051 Addressable Registers
(512)
Reserved (128)
128 Bytes GPIF Waveforms
512 Bytes
8051 xdata RAM
F000
Reserved (512)
64 Bytes EP1OUT
64 Bytes EP1IN
4 kBytes EP2-EP8
buffers
(8 x 512)
Figure 4. Register Address Memory
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