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參數(shù)資料
| 型號(hào)： | CY3683 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | MoBL-USB⑩ TX2 USB 2.0 UTMI Transceiver |
| 中文描述： | 的MoBL - USB TX2的⑩個(gè)USB 2.0收發(fā)器采用UTMI |
| 文件頁數(shù)： | 3/14頁 |
| 文件大?。?/td> | 490K |
| 代理商： | CY3683 |
CY7C68000A
Document #: 38-08052 Rev. *F
Page 3 of 14
Mode 2 disables Bit Stuff and NRZI encoding logic so ‘1’s
loaded from the data
bus becomes ‘J’s on the
DPLUS
/
DMINUS
lines and ‘0’s become ‘K’s.
DPLUS/DMINUS Impedance Termination
The CY7C68000A does not require external resistors for USB
data line impedance termination or an external pull up resistor
on the DPLUS line. These resistors are incorporated into the
part. They are factory trimmed to meet the requirements of
USB 2.0. Incorporating these resistors also reduces the pin
count on the part.
Pin Assignments
The following pages illustrate the individual pin diagrams that are available in the 56-pin QFN and 56-pin VFBGA packages.
The packages offered use either an 8-bit (60 MHz) or 16-bit (30 MHz) bus interface.
Figure 1. CY7C68000A 56-pin QFN Pin Assignment
D
D
V
C
D
R
D
D
C
D
U
G
T
V
C
V
56-pin QFN
2
2
2
2
2
2
2
2
2
1
1
1
1
1
4
4
4
4
4
4
4
5
5
5
5
5
5
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
42
41
40
39
38
37
36
35
34
33
32
31
30
29
GND
D5
Reserved
D6
D7
D8
D9
Reserved
D10
D11
V
CC
D12
GND
D13
TXReady
Suspend
Reset
AV
CC
XTALOUT
XTALIN
AGND
AV
CC
DPLUS
DMINUS
AGND
XcvrSelect
TermSelect
OpMode0
V
C
D
D
R
T
R
R
R
G
L
L
V
C
G
O
CY7C68000A
56-pin QFN
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