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參數(shù)資料
| 型號： | CY3683 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | MoBL-USB⑩ TX2 USB 2.0 UTMI Transceiver |
| 中文描述： | 的MoBL - USB TX2的⑩個USB 2.0收發(fā)器采用UTMI |
| 文件頁數(shù)： | 12/14頁 |
| 文件大?。?/td> | 490K |
| 代理商： | CY3683 |
CY7C68000A
Document #: 38-08052 Rev. *F
Page 12 of 14
PCB Layout Recommendations
[3]
The following recommendations must be followed to ensure
reliable high-performance operation.
At least a four-layer impedance controlled board is required
to maintain signal quality
Specify impedance targets (ask your board vendor what
they can achieve)
To control impedance, maintain trace widths and trace
spacing to within written specifications
Minimize stubs to minimize reflected signals
Connections between the USB connector shell and signal
ground must be done near the USB connector
Bypass/flyback capacitors on VBus, near the connector, are
recommended
Note
3. Source for recommendations:
EZ-USB FX2 PCB Design Recommendations
, http:///www.cypress.com/cfuploads/support/app_notes/FX2_PCB.pdf
High-
Speed USB Platform Design Guidelines
, http://www.usb.org/developers/docs/hs_usb_pdg_r1_0.pdf.
DPLUS and DMINUS trace lengths must be kept to within
2 mm of each other in length, with preferred length of 20–30
mm
Maintain a solid ground plane under the DPLUS and
DMINUS traces. Do not allow the plane to be split under
these traces
It is best to have no vias placed on the DPLUS or DMINUS
trace routing
Isolate the DPLUS and DMINUS traces from all other signal
traces by no less than 10 mm
Quad Flat Package No Leads (QFN) Package
Design Notes
Electrical contact of the part to the Printed Circuit Board (PCB)
is made by soldering the leads on the bottom surface of the
Package Diagrams
(continued)
Figure 7. 56 VFBGA (5 x 5 x 1.0 mm) 0.50 Pitch, 0.30 Ball BZ56
TOP VIEW
PIN A1 CORNER
0.50
3.50
5.00±0.10
BOTTOM VIEW
0.10(4X)
3
5
0
0.15 M C A B
0.05 M C
0.30±0.05(56X)
A1 CORNER
-B-
-A-
1
0
0
0
SEATING PLANE
0
0
-C-
SIDE VIEW
5
5.00±0.10
REFERENCE JEDEC: MO-195C
PACKAGE WEIGHT: 0.02 grams
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D
C
B
A
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6
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001-03901-*B
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