參數(shù)資料
型號(hào): CY2HH8110
廠(chǎng)商: Cypress Semiconductor Corp.
英文描述: 1.5V 1:10 HSTL Fanout Buffer(1.5V 1:10 HSTL輸出緩沖器)
中文描述: 1.5V的1:10 HSTL扇出緩沖器(1.5V的輸出緩沖器1:10 HSTL)
文件頁(yè)數(shù): 3/7頁(yè)
文件大?。?/td> 90K
代理商: CY2HH8110
CY2HH8110
Document #: 38-07556 Rev **
Page 3 of 7
Absolute Maximum Conditions
Parameter
V
DD
V
DD
V
IN
Description
Condition
Min.
–0.5
1.35
-0.5
Max.
2.5
1.65
V
DD
+ 0.5
Unit
V
V
V
DC Supply Voltage
DC Operating Voltage
DC Input Voltage
Functional
Relative to V
SS
, with or V
DD
applied
Relative to V
SS
V
OUT
V
TT
LU
R
PS
T
S
T
A
T
J
JC
JA
ESD
H
DC Output Voltage
Output termination Voltage
Latch Up Immunity
Power Supply Ripple
Temperature, Storage
Temperature, Operating Ambient
Temperature, Junction
Dissipation, Junction to Case
Dissipation, Junction to Ambient
ESD Protection (Human Body
Model)
Failure in Time
–0.5
V
DD
+ 0.5
V
DD
÷
2
V
V
Functional
Ripple Frequency < 100 kHz
Non-functional
Functional
Functional
Functional
Functional
200
mA
mVp-p
°C
°C
°C
°C/W
°C/W
V
150
+150
+85
+150
42
105
–65
0
1600
FIT
Manufacturing test
10
ppm
Multiple Supplies
: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
DC Electrical Specifications
(V
DD
= 1.5V ± 8%, T
A
= 0°C to +85°C)
Parameter
Description
V
IL
Input Voltage, Low
V
IH
Input Voltage, High
V
IL
Input Voltage, Low
V
IH
Input Voltage, High
V
OL
V
OH
I
IL
I
IH
I
DDQ
Quiescent Supply Current
I
DD
Dynamic Supply Current
C
IN
Input Pin Capacitance
C
OUT
Output Pin Capacitance
Z
OUT
Output Impedance
Condition
Min.
–0.30
0.85
-0.30
0.7 * V
DD
-0.3
1.0
Typ.
215
4.5
25
Max.
0.65
1.80
0.3 * V
DD
V
DD
+ 0.3
0.4
V
DD
+ 0.3
–10
100
1
250
6
6
Unit
V
V
V
V
V
V
μ
A
μ
A
mA
mA
pF
pF
HSTL input, V
REF
= 0.75V
OE# input
Output Voltage, Low
[3]
Output Voltage, High
[3]
Input Current, Low
[4]
Input Current, High
[4]
I
OL
= 16 mA
I
OH
= –16 mA
V
IL
= V
SS
V
IH
= V
DD
V
IN
= 0V, outputs disabled
Outputs loaded @ 62.5 MHz
AC Electrical Specifications
(V
DD
= 1.5V ± 8%, T
A
= 0°C to +85°C)
[5]
Parameter
Description
f
in
Input Frequency
V
IL
(AC)
AC Input HIGH Voltage
V
IH
(AC)
AC Input LOW Voltage
t
r
, t
f
DC
Output duty cycle
Condition
Min.
0.95
0.3
48
45
Typ.
Max.
150
Unit
MHz
V
V
ns
%
V
REF
=V
DD
/2, Internal Voltage
Reference
0.55
1.5
52
55
Output rise/fall time
[6]
20% to 80%
Fout < 100 MHz
Fout > 100 MHz
Notes:
3.
4.
5.
6.
Driving 50
series terminated or symmetrically double parallel terminated transmission line to a termination voltage of V
TT
.
Inputs have pull-down resistors that affect the input current.
AC characteristics apply for series or parallel output termination to V
TT
. Parameters are guaranteed by characterization and are not 100% tested.
tr/tf times are faster with parallel terminated loads.
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CY2HH8110AC 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:1.5V 1:10 HSTL Fanout Buffer
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