參數(shù)資料
型號(hào)： CY2DP814SI
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： 時(shí)鐘及定時(shí)
英文描述： 1:4 Clock Fanout Buffer
中文描述： LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
封裝： 0.150 INCH, SOIC-16
文件頁(yè)數(shù)： 3/9頁(yè)
文件大?。?/td> 120K
代理商： CY2DP814SI
ComLink
Series
CY2DP814
Document #: 38-07060 Rev. *B
Page 3 of 9
Maximum Ratings
[1][2]
Storage Temperature: .................................
–
65
°
C to +150
°
C
Ambient Temperature:...................................
–
40
°
C to +85
°
C
Supply Voltage to Ground Potential
(Inputs and V
CC
only).......................................
–
0.3V to 4.6V
Supply Voltage to Ground Potential
Table 1. EN1 EN2 Function Table
(Outputs only)........................................
–
0.3V to V
DD
+ 0.3V
DC Input Voltage ...................................
–
0.3V to V
DD
+ 0.3V
DC Output Voltage.................................
–
0.3V to V
DD
+ 0.9V
Power Dissipation........................................................0.75W
Enable Logic
Input
Outputs
EN1
H
H
L
L
EN2
H
L
L
H
IN+
H
H
H
X
IN
–
L
L
L
X
QnA
H
H
H
Z
QnB
L
L
L
Z
Table 2. Input Receiver Configuration for Differential or LVTTL/LVCMOS
CONFIG Pin 2 Binary Value
1
Input Receiver Family
LVTTL in LVCMOS
LVDS
LVPECL
Input Receiver Type
Single ended, non-inverting, inverting, void of bias resistors.
Low voltage differential signaling
Low voltage pseudo (positive) emitter coupled logic
0
Table 3. Function Control of the TTL Input Logic Used to Accept or Invert the Input Signal
LVTTL/LVCMOS INPUT LOGIC
Input Logic
Input Condition
Output Logic Q pins
Ground
IN- Pin 7
IN+ Pin 6
IN- Pin 7
IN+ Pin 6
IN+ Pin 6
IN- Pin 7
IN+ Pin 6
IN- Pin 7
Input
True
V
CC
Input
Invert
Ground
Input
Invert
V
CC
Input
True
Table 4. Power Supply Characteristics
Parameter
I
CCD
Description
Test Conditions
Min.
Typ. Max.
Unit
Dynamic Power Supply Current V
= Max.
Input toggling 50% Duty Cycle, Outputs Loaded
V
= Max.
Input toggling 50% Duty Cycle, Outputs Loaded,
fL= 100 MHz
1.5
2.0
mA/MHz
I
C
Total Power Supply Current
90
100
mA
Table 5. D.C. Electrical Characteristics: 3.3V
–
LVDS Input
Parameter
V
ID
Description
Conditions
Min. Typ. Max. Unit
100
I
VID
I
/2
(
I
VID
I
/2)
±10
±0
Magnitude of Differential Input Voltage
Common-Mode of Differential Input Voltage
I
V
ID
I
(min. and max.)
Input High Current
Input Low Current
Input High Current
600
mV
V
IC
2.4
–
V
I
IH
I
IL
I
I
Notes:
1.
V
DD
= Max.
V
DD
= Max.
V
DD
= Max., V
IN
= V
DD
(max.)
V
IN
= V
DD
V
IN
= V
SS
±20
±20
±20
uA
uA
uA
Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is intended to be a stress rating only
and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
2.
相關(guān)PDF資料
PDF描述
CY2DP814SIT 1:4 Clock Fanout Buffer
CY2DP814ZI 1:4 Clock Fanout Buffer
CY2DP814ZIT 1:4 Clock Fanout Buffer
CY2HH8110 1.5V 1:10 HSTL Fanout Buffer(1.5V 1:10 HSTL輸出緩沖器)
CY3683 MoBL-USB⑩ TX2 USB 2.0 UTMI Transceiver
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY2DP814SIT 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:4 Clock Fanout Buffer
CY2DP814ZC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:4 Clock Fanout Buffer
CY2DP814ZCT 制造商:Cypress Semiconductor 功能描述:
CY2DP814ZI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:4 Clock Fanout Buffer
CY2DP814ZIT 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:4 Clock Fanout Buffer
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*