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參數(shù)資料
| 型號： | CY2DP814SC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 1:4 Clock Fanout Buffer |
| 中文描述： | LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封裝： | 0.150 INCH, SOIC-16 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 120K |
| 代理商： | CY2DP814SC |
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CY2DP814
Document #: 38-07060 Rev. *B
Page 6 of 9
Notes:
8.
9.
V
measurement requires equipment with a 3-dB bandwidth of at least 300 MHz.
All input pulses are supplied by a frequency generator with the following characteristics: TR and tF
≤
1 nS; pulse re-rate = 50 Mpps; pulse width = 10
±
0.2 nS.
1.4V
1.0V
V
I(A)
V
I(B)
Voc (ss)
V
DD
Voc (pp)
VOD
VOC
TPA
50
TPC
TPB
GND
150
150
Standard Term ination
Pulse
Generator
A
B
En1
En2
Figure 3. Test Circuit & Voltage Definitions for the Driver Common-mode Output Voltage
[3, 4, 5, 7, 8]
0.0V
100%
80%
20%
0%
tR
tF
1.4V
1.0V
V
I(A)
V
I(B)
En1
En2
TPA
50
TPC
50
TPB
GND
150
150
Standard Termination
Pulse
Generator
A
B
10pF
VDD-2V
Figure 4. Test Circuit & Voltage Definitions for the Differential Output Signal
[3, 4, 5, 6, 7]
TPA
50
50
TPB
Parallel Termination
En1
En2
Pulse
Generator
Pulse
Generator
VOC
t
pd
t
pe
DE
Q
+
VDD-2V
Figure 5. Test Circuit & Voltage Definitions for the Driver Common-Mode Output Voltage
[3, 4, 5, 8, 9]
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| CY2DP814 | 1:4 Clock Fanout Buffer |
| CY2DP814SCT | 1:4 Clock Fanout Buffer |
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相關代理商/技術參數(shù) |
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| CY2DP814SCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:4 Clock Fanout Buffer |
| CY2DP814SI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:4 Clock Fanout Buffer |
| CY2DP814SIT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:4 Clock Fanout Buffer |
| CY2DP814ZC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:4 Clock Fanout Buffer |
| CY2DP814ZCT | 制造商:Cypress Semiconductor 功能描述: |
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