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參數(shù)資料
| 型號： | CL10K50VBC356-2 |
| 英文描述： | FPGA |
| 中文描述： | FPGA的 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 178K |
| 代理商： | CL10K50VBC356-2 |
The LIBERATOR CL10KA family offers you all of the time-to-
market benefits of designing with programmable logic. Simply
use Altera FLEX 10KA FPGAs to prototype and verify the
design. Then, take five minutes to submit the bitstream using
Clear Logic's web site! Within eight weeks, your system can be
in volume production using compatible Clear Logic devices.
LIBERATOR technology frees you to completely design,
prototype, and verify your custom logic using Altera FLEX 10KA
products. Clear Logic's innovative technology eliminates NRE
costs, test vector development, ordering minimums, and long lead
times. No re-simulation or re-layout is required, because Clear
Logic offers an architecture that is exactly compatible to the
functionality of the FPGA prototype. Clear Logic's NoFault test
technology ensures complete test coverage through the use of
special scan test registers.
The LIBERATOR family is based upon an array of logic
elements. Each logic element contains a configurable look-up
table for combinatorial functions and a register for sequential
operations. Eight logic elements in a group form a block. Logic
functions and signal routing are defined by Clear Logic's
proprietary vertical metal links.
Laser-based configuration allows quick-turn prototyping and
eliminates NRE costs for photomasks. Inherent CL10KA family
performance benefits include extremely consistent propagation
delays, reduced power consumption, and improved immunity to
noise and upset events.
The "Gate Array" configuration mode eliminates the need for
external EPROMs or software configuration. The LIBERATOR
device is already factory-configured when it is shipped. When
using the device in the "Gate Array" mode, it powers up fully
configured. In this mode, if the customer selects INIT_DONE
option, this pin will always be high.
Description
LIBERATOR CL10K30A
Page 2
Configuration
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CL10K50VBC356-3 | FPGA |
| CL10K50VBI356-3 | FPGA |
| CL39-65608V-55 | x8 SRAM |
| CL39-65608V-70 | x8 SRAM |
| CL3K-67132L-45 | x8 Dual-Port SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CL10K50VBC356-3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA |
| CL10K50VBI356-3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA |
| CL10KR | 制造商:MISC. COMMERCIAL HRD 功能描述: |
| CL10L101JBNC | 制造商:Samsung Semiconductor 功能描述: |
| CL10X106MO8NRNC | 功能描述:10μF 16V 陶瓷電容器 X6S 0603（1608 公制） 0.063" 長 x 0.031" 寬（1.60mm x 0.80mm） 制造商:samsung electro-mechanics america, inc. 系列:CL 包裝:剪切帶（CT） 零件狀態(tài):有效 電容:10μF 容差:±20% 電壓 - 額定:16V 溫度系數(shù):X6S 安裝類型:表面貼裝，MLCC 工作溫度:-55°C ~ 105°C 應(yīng)用:通用 等級:- 封裝/外殼:0603（1608 公制） 大小/尺寸:0.063" 長 x 0.031" 寬（1.60mm x 0.80mm） 高度 - 安裝（最大值）:- 厚度（最大值）:0.035"（0.90mm） 引線間距:- 特性:- 引線形式:- 標準包裝:1 |
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