參數(shù)資料
型號： BU-62743G4-160K
廠商： DATA DEVICE CORP
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
封裝： 1 INCH, CERAMIC, QFP-72
文件頁數(shù)： 14/99頁
文件大小： 578K
代理商： BU-62743G4-160K
Data Device Corporation
62743_pre7_noSA-DB.DOC
www.ddc-web.com
8-07-02
21
Table 15. REG5 Discard Timer Preload Register
(Read/Write 814h)
BIT
DESCRIPTION
31 (MSB)
0
16
0
15
DISCARD TIMER VALUE- BIT 15 (MSB)
0 (LSB)
DISCARD TIMER VALUE- BIT 0 (LSB)
DISCARD TIMER VALUE: Write this register to set the value to be used for the
discard timer. The default value is “0”. The default value meets the PCI spec
and no access to this register is needed for normal applications.
Table 16. REG6 General Purpose Register
(Read/Write 818h)
BIT
DESCRIPTION
31 (MSB)
RESERVED - BIT 31 (MSB)
0 (LSB)
RESERVED - BIT 0 (LSB)
This register will be all 0s after RST#. This read/write register is available for
customer use, perhaps as a flag register for signaling between bus masters.
Table 17. REG7 Reserved Register
(Write 81Ch)
BIT
DESCRIPTION
31 (MSB)
RESERVED, WRITE AS 0 - BIT 31 (MSB)
1
CLEAR FAILSAFE INTERRUPT
0 (LSB)
ACE RESET - BIT 0 (LSB)
This register will be all 0s after RST#. No access to this register is needed for
normal applications.
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