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參數(shù)資料
| 型號(hào)： | BH16500CDL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | ECONOLINE: RM & RL - Single Output Rail- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- High Efficiency for Low Power Applications- UL94V-0 Package Material- Toroidal Magnetics- Fully Encapsulated- Efficiency to 80% |
| 中文描述： | ABT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 7.50 MM, PLASTIC, SOT-371-1, SSOP3-56 |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 88K |
| 代理商： | BH16500CDL |
Product specification
74ABT16500C
74ABTH16500C
18-bit universal bus transceiver (3-State)
1998 Feb 27
8
AC CHARACTERISTICS
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
o
C
V
CC
= +5.0V
TYP
T
amb
= –40 to +85
o
C
V
CC
= +5.0V
±
0.5V
MIN
UNIT
MIN
MAX
MAX
f
max
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Maximum clock frequency
1
150
225
150
MHz
Propagation delay
An to Bn or Bn to An
2
1.0
1.0
2.1
1.7
3.0
2.5
1.0
1.0
3.4
3.0
ns
Propagation delay
LEAB to Bn or LEBA to An
3
1.0
1.0
3.2
2.8
4.3
3.7
1.0
1.0
4.9
4.0
ns
Propagation delay
CPAB to Bn or CPBA to An
1
1.0
1.0
3.4
2.6
4.5
3.5
1.0
1.0
5.3
4.6
ns
Output enable time
to HIGH and LOW level
5
6
1.0
1.5
3.3
2.4
4.4
3.2
1.0
1.5
5.0
3.9
ns
Output disable time
from HIGH and LOW level
5
6
1.5
1.4
3.3
2.5
4.3
3.3
1.5
1.4
5.3
3.9
ns
AC SETUP REQUIREMENTS
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
o
C
V
CC
= +5.0V
MIN
T
amb
= –40 to +85
o
C
V
CC
= +5.0V
±
0.5V
MIN
UNIT
TYP
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
Setup time, HIGH or LOW
An to CPAB or Bn to CPBA
4
2.0
2.0
0.7
0.6
2.0
2.0
ns
Hold time, HIGH or LOW
An to CPAB or Bn to CPBA
4
0.7
0.7
–0.5
–0.8
0.7
0.7
ns
Setup time, HIGH or LOW
An to LEAB or Bn to LEBA
4
2.0
2.0
0.1
0.1
2.0
2.0
ns
Hold time HIGH or LOW
An to LEAB or Bn to LEBA
4
0.7
0.7
–0.1
–0.1
0.7
0.7
ns
t
w
Pulse width, HIGH or LOW
CPAB or CPBA
1
3
1.2
3
ns
t
w
(H)
Pulse width, HIGH
LEAB or LEBA
3
3
1.2
3
ns
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
V
M
V
M
V
M
V
M
t
W
(L)
t
PHL
1/f
MAX
CPBA or
CPAB
An or Bn
t
W
(H)
SA00324
t
PLH
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
V
OL
t
PLH
V
OH
An or Bn
An or Bn
V
M
V
M
t
PHL
V
M
V
M
SA00132
Waveform 2. Propagation Delay, Transparent Mode
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| BH16501ADL | 18-bit universal bus transceiver 3-State |
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| BH16501ADGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit universal bus transceiver 3-State |
| BH16501ADL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit universal bus transceiver 3-State |
| BH16541DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit buffer/line driver 3-State |
| BH16541DL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit buffer/line driver 3-State |
| BH16543DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit latched transceivers with dual enable 3-State |
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