參數(shù)資料
型號(hào): AT17LV040A-10PI
廠商: Atmel Corp.
元件分類: FPGA
英文描述: FPGA Configuration EEPROM Memory
中文描述: FPGA配置EEPROM存儲(chǔ)器
文件頁(yè)數(shù): 20/24頁(yè)
文件大?。?/td> 221K
代理商: AT17LV040A-10PI
20
AT17LV65/128/256/512/010/002/040
2321E–CNFG–06/03
20J – PLCC
2325 Orchard Parkway
San Jose, CA 95131
R
TITLE
20J
, 20-lead, Plastic J-leaded Chip Carrier (PLCC)
DRAWING NO.
REV.
Notes:
1. This package conforms to JEDEC reference MS-018, Variation AA.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254 mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
3. Lead coplanarity is 0.004" (0.102 mm) maximum.
A
4.191
4.572
A1
2.286
3.048
A2
0.508
D
9.779
10.033
D1
8.890
9.042
Note 2
E
9.779
10.033
E1
8.890
9.042
Note 2
D2/E2
7.366
8.382
B
0.660
0.813
B1
0.330
0.533
e
1.270 TYP
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
NOM
MAX
NOTE
1.14(0.045) X 45
PIN NO. 1
IDENTIFIER
1.14(0.045) X 45
0.51(0.020)MAX
45 MAX (3X)
0.318(0.0125)
0.191(0.0075)
A2
A
A1
B1
D2/E2
B
e
E1
E
D1
D
B
20J
10/04/01
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