參數(shù)資料
型號: AN5829
廠商: Panasonic Corporation
英文描述: Sound multiplex decoder IC for the U.S. televisions
中文描述: 多重聲解碼器IC美國電視
文件頁數(shù): 14/17頁
文件大?。?/td> 131K
代理商: AN5829
AN5829S
ICs for TV
14
I
Technical Information
[1] I
2
C bus (continued)
1. Receiving mode (continued)
<I
2
C of this IC>
1) Enhances adjustment-free mechanism of the TV set thanks to DAC control 3 and 9 switches
2) Auto-increment function
Sub address 0
*
: Auto-increment mode
(Data sequential transfer leads to the sequential change of sub address, so that the data is inputted.)
Sub address 8
*
: Data renewal mode
(With sequential data transfer, data are inputted in the same sub address.)
3) I
2
C bus protocol
Slave address
Format (normal)
S
Slave address
A
Sub address
W
Auto-increment mode/data renewal mode
S
Slave address
4) As the initial state of DAC is not guaranteed, never fail to input the following data in a power on mode.
"06" register: "04"
"00" register: adjustment data
"01" register: adjustment data
"02" register: "00"
"05" register: adjustment data
2. Transmission mode (read mode)
I
2
C bus protocol
Slave address: 10110111 (B7H)
Format
S
Slave address
A
W
Sub address
A
Data 1
A
Data 2
A
A
P
Data n
A
Data byte
A
P
Start
condition
Acknowledge bit
Write Mode: 0
Stop
condition
A
Data byte
A
P
Read
Mode: 1
R
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