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參數(shù)資料
| 型號： | AMP-08 |
| 英文描述： | Operational Amplifier |
| 中文描述： | 運算放大器 |
| 文件頁數(shù)： | 1/1頁 |
| 文件大?。?/td> | 7K |
| 代理商： | AMP-08 |
The
Analog
Mixed Signal Company
Amplifier
Name
Description
This op-amp is designed for on chip signal processing, especially as a low-noise input amplifier. It uses pole splitting for
compensation. Stable operation at unity gain frequency is not feasible due to the three stage amplifier architecture. The
results are simulated with extracted parasitics. To adapt this op-amp to other demands, scale the output stage and the
Miller-caps or change the bias currents.
ID:
010
Conditions
Temperature
Reference Current (Iref)
V
DD
V
SS
Load
27°C
10 μA
2.5 V
-2.5 V
10 kOhms || 10 pF
Simulated Data
Parameter
Supply Voltage
Reference Current
Supply Current
Input Offset Voltage
Symbol
V
DD
I
ref
I
DD
V
IO
Unit
V
μA
μA
mV
Min
Typ
5
10
Max
Condition
525
Unity Gain
Unity Gain, No Parasitics, delta
L=0.1μm
Unity Gain, No Parasitics, delta
L=0.1μm
0.91
TK V
IO
TK(V
IO
)
μV/K
9.84
122.1
4.2
-65
Voltage Gain
Transit Frequency
Phasemargin
0.01% Settling Time
v
f
T
m
dB
MHz
deg
ns
No stable operation at unity gain
possible.
No stable operation at unity gain
possible.
No stable operation at unity gain
possible.
< 5 ppm
V
DD
= +5 V, Unity Gain
CMRR > 70 dB @ 10 Hz
CMRR > 223.2 dB @ 10 Hz
f
CM
= 10 kHz, V
CM
= 0V
f
PS
= 1 Hz
Slew Rate
S
V/μs
Maximum Large Signal
Frequency
Output Swing
Static Nonlinearity
Commonmode Range
kHz
V
ppm
V
V
OUT
-1.13
1.39
5
V
CM
-2
1
Common Mode Rejection Ratio
Power Supply Rejection Ratio
CMRR
PSRR
dB
dB
204.8
184.2
AMP-05
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