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參數(shù)資料
| 型號： | AM79C987 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | Hardware Implemented Management Information Base (HIMIB) Device |
| 中文描述： | 硬件實現(xiàn)管理信息庫（HIMIB）設(shè)備 |
| 文件頁數(shù)： | 19/30頁 |
| 文件大?。?/td> | 183K |
| 代理商： | AM79C987 |
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AMD
P R E L I M I N A R Y
19
Am79C987
Data Rate Mismatches
P[4:0] = 16–23, 31, R[4:0] = 10
Byte 0
Byte 1
Byte 2
Byte 3
bit 7
bit 31
bit 0
bit 24
MSB
LSB
D Port Read
“Data Rate Mismatches” is a read-only attribute that
counts the number of occurrences where the frequency,
or data rate of the incoming signal is detectably different
from the local transmit frequency. The attribute is a
32-bit counter that is incremented on each such event.
Note that the rate at which the “Data Rate Mismatches”
attribute will increment, will depend on the magnitude of
the difference between the received signal clock and the
local transmit frequency.
Auto Partitions
P[4:0] = 16–23, 31, R[4:0] = 11
Byte 0
Byte 1
Byte 2
Byte 3
bit 7
bit 31
bit 0
bit 24
MSB
LSB
D Port Read
“Auto Partitions” is a read-only attribute that counts the
number of instances where the repeater has partitioned
this port from the network. This attribute is a 32-bit
counter that is incremented on each such event. The ap-
proximate minimum time between counter roll-overs is
20 days.
Source Address Changes
P[4:0] = 16–23, 31, R[4:0] = 12
Byte 0
Byte 1
Byte 2
Byte 3
bit 7
bit 31
bit 0
bit 24
MSB
LSB
D Port Read
“Source Address Changes” is a read-only attribute that
counts the number of times the Source Address field of
valid frames received on a port changes. This attribute is
a 32-bit counter with a minimum rollover of 81 hours.
Note:
This may indicate whether a port is connected to
a single DTE or another multi-user segment.
Last Source Address (LSA)
P[4:0] = 16–23, 31, R[4:0] = 14
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
bit 7
bit 31
bit 0
bit 24
MSB
LSB
D Port Read/Write
“Last Source Address” is a read/write attribute that
saves the value of the Source Address field of the last
valid frame it received. This attribute is a 6-byte field.
This 6-byte register may be read or written. This feature
allows the software to preset this attribute to the known
Node ID, for a single node segment. A change in the
contents of this register would then signal an anomaly.
This will cause the Source Address Changes attribute to
increment. Furthermore, setting the respective TP/AUI
Port Source Address Change Interrupt Enable bit (in the
Port Control Registers), can be used to generate a hard-
ware interrupt to signal the software to automatically
disable this port.
相關(guān)PDF資料 |
PDF描述 |
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| AM79C987JC | Hardware Implemented Management Information Base (HIMIB) Device |
| AM79C987JCB | Hardware Implemented Management Information Base (HIMIB) Device |
| AM79C988A | IC,Motor Controller,CMOS,SOP,8PIN |
| AM79C988 | Quad Integrated Ethernet Transceiver (QuIET⑩) |
| Am79C988BJC | Quad Integrated Ethernet Transceiver (QuIET⑩) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C987JC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Hardware Implemented Management Information Base (HIMIB) Device |
| AM79C987JCB | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Hardware Implemented Management Information Base (HIMIB) Device |
| AM79C988 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Quad Integrated Ethernet Transceiver (QuIET⑩) |
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