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參數(shù)資料
| 型號： | AM79C987 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | Hardware Implemented Management Information Base (HIMIB) Device |
| 中文描述： | 硬件實(shí)現(xiàn)管理信息庫（HIMIB）設(shè)備 |
| 文件頁數(shù)： | 17/30頁 |
| 文件大?。?/td> | 183K |
| 代理商： | AM79C987 |
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AMD
P R E L I M I N A R Y
17
Am79C987
Note that the contents of all attribute registers are main-
tained during an external reset.
These attributes and their definitions comply with the
IEEE 802.3k Layer Management for 10 Mbyte/s
Baseband Repeaters Repeater Management Standard.
A brief summary of attribute description is included here
for reference only. For detailed description, refer to the
IEEE 802.3k document.
Readable Frames
P[4:0] = 16–23, 31 , R[4:0] = 0
Byte 0
Byte 1
Byte 2
Byte 3
bit 7
bit 31
bit 0
bit 24
MSB
LSB
D Port Read
“Readable Frames” is a read-only attribute that counts
the number of valid frames detected by the port. Valid
frames are from 64 bytes to 1518 bytes in length, have a
valid frame CRC and are received without a collision.
This attribute is a 32-bit counter with a minimum rollover
time of 80 hours.
Readable Octets
P[4:0] = 16–23, 31, R[4:0] = 1
Byte 0
Byte 1
Byte 2
Byte 3
bit 7
bit 31
bit 0
bit 24
MSB
LSB
D Port Read
“Readable Octets” is a read-only attribute that counts
the number of octets received on each port. This num-
ber is determined by adding the frame length to this reg-
ister at the completion of every valid frame. This
attribute is a 32-bit counter with a minimum rollover time
of 58 minutes.
Frame Check Sequence (FCS) Errors
P[4:0] = 16–23, 31 , R[4:0] = 2
Byte 0
Byte 1
Byte 2
Byte 3
bit 7
bit 31
bit 0
bit 24
MSB
LSB
D Port Read
“Frame Check Sequence Errors” is a read-only attribute
that counts the number of frames detected on each port
with an invalid frame check sequence. This counter is in-
cremented on each frame of valid length (64 bytes to
1518 bytes) that does not suffer a collision during the
frame. This counter is incremented on each invalid
frame, however it is not incremented for frames with
both framing errors and frame check sequence errors.
This attribute is a 32-bit counter with a minimum rollover
time of 80 hours.
Alignment Errors
P[4:0] = 16–23, 31, R[4:0] = 3
Byte 0
Byte 1
Byte 2
Byte 3
bit 7
bit 31
bit 0
bit 24
MSB
LSB
D Port Read
“Alignment Errors” is a read-only attribute that counts
the number of frames detected on each port with an FCS
error and a framing error. This counter is incremented
on each frame of valid length (64 bytes to 1518 bytes)
that does not suffer a collision during the frame. Frames
that have both framing errors and FCS errors are
counted by this attribute, but not by the “Frame Check
Sequence Errors” attribute. This attribute is a 32-bit
counter with a minimum rollover time of 80 hours.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C987JC | Hardware Implemented Management Information Base (HIMIB) Device |
| AM79C987JCB | Hardware Implemented Management Information Base (HIMIB) Device |
| AM79C988A | IC,Motor Controller,CMOS,SOP,8PIN |
| AM79C988 | Quad Integrated Ethernet Transceiver (QuIET⑩) |
| Am79C988BJC | Quad Integrated Ethernet Transceiver (QuIET⑩) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C987JC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Hardware Implemented Management Information Base (HIMIB) Device |
| AM79C987JCB | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Hardware Implemented Management Information Base (HIMIB) Device |
| AM79C988 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Quad Integrated Ethernet Transceiver (QuIET⑩) |
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