參數(shù)資料
型號(hào)： AM45DL6408G
英文描述： 250NS, CERDIP, 883C; LEV B COMPLIANT(EEPROM)
中文描述： 64兆位（8米× 8位/ 4米× 16位）CMOS和8兆位（1 M中的x 8-Bit/512畝x 16位）（初步）
文件頁(yè)數(shù)： 16/64頁(yè)
文件大?。?/td> 1191K
代理商： AM45DL6408G
August 28, 2002
Am45DL32x8G
15
P R E L I M I N A R Y
If the device is deselected during erasure or program-
ming, the device draws active current until the
operation is completed.
I
CC3
f in the table represents the standby current spec-
ification.
Automatic Sleep Mode
The automatic sleep mode minimizes Flash device en-
ergy consumption. The device automatically enables
this mode when addresses remain stable for t
ACC
+
30 ns. The automatic sleep mode is independent of
the CE#f, WE#, and OE# control signals. Standard ad-
dress access timings provide new data when ad-
dresses are changed. While in sleep mode, output
data is latched and always available to the system.
I
CC5
f in the table represents the automatic sleep mode
current specification.
RESET#: Hardware Reset Pin
The RESET# pin provides a hardware method of re-
setting the device to reading array data. When the RE-
SET# pin is driven low for at least a period of t
RP
, the
device immediately terminates any operation in
progress, tristates all output pins, and ignores all
read/write commands for the duration of the RESET#
pulse. The device also resets the internal state ma-
chine to reading array data. The operation that was in-
terrupted should be reinitiated once the device is
ready to accept another command sequence, to en-
sure data integrity.
Current is reduced for the duration of the RESET#
pulse. When RESET# is held at V
SS
±0.3 V, the device
draws CMOS standby current (I
CC4
f). If RESET# is
held at V
IL
but not within V
SS
±0.3 V, the standby cur-
rent will be greater.
The RESET# pin may be tied to the system reset cir-
cuitry. A system reset would thus also reset the Flash
memory, enabling the system to read the boot-up firm-
ware from the Flash memory.
If RESET# is asserted during a program or erase op-
eration, the RY/BY# pin remains a
“
0
”
(busy) until the
internal reset operation is complete, which requires a
time of t
READY
(during Embedded Algorithms). The
system can thus monitor RY/BY# to determine
whether the reset operation is complete. If RESET# is
asserted when a program or erase operation is not ex-
ecuting (RY/BY# pin is
“
1
”
), the reset operation is com-
pleted within a time of t
READY
(not during Embedded
Algorithms). The system can read data t
RH
after the
RESET# pin returns to V
IH
.
Refer to the AC Characteristics tables for RESET# pa-
rameters and to
Figure 15
for the timing diagram.
Output Disable Mode
When the OE# input is at V
IH
, output from the device is
disabled. The output pins are placed in the high
impedance state.
Table 5.
Device Bank Division
Device
Part Number
Bank 1
Bank 2
Megabits
Sector Sizes
Megabits
Sector Sizes
Am29DL322G
4 Mbit
Eight 8 Kbyte/4 Kword,
seven 64 Kbyte/32 Kword
28 Mbit
Fifty-six
64 Kbyte/32 Kword
Am29DL323G
8 Mbit
Eight 8 Kbyte/4 Kword,
fifteen 64 Kbyte/32 Kword
24 Mbit
Forty-eight
64 Kbyte/32 Kword
Am29DL324G
16 Mbit
Eight 8 Kbyte/4 Kword,
thirty-one 64 Kbyte/32 Kword
16 Mbit
Thirty-two
64 Kbyte/32 Kword
相關(guān)PDF資料
PDF描述
AM46-0006 250NS, LCC, 883C; LEV B FULLY COMPLIANT(EEPROM)
AM46-0007 DIE(EEPROM)
AM486DE2 Am486DE2 Microprocessor Data Sheet
AM486DX Am486DX - Am486DX Block Diagram
AM486DXPGA Am486DX PGA - Am486DX PGA Package Temperature Comparisons
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM45N06-16D 制造商:ANALOGPOWER 制造商全稱:ANALOGPOWER 功能描述:N-Channel 60-V (D-S) MOSFET
AM45W 制造商:ECLIPSE 功能描述:BLADE LOW ALLOY 12X1/2X0.025X18TPI
AM460 制造商:AME 制造商全稱:Analog Microelectronics 功能描述:Industrial Converter and Protector IC
AM46-0006 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC
AM46-0007 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*