參數(shù)資料
型號: ADC1112D125HN
廠商: NXP Semiconductors N.V.
元件分類: 外設及接口
英文描述: Dual 11-bit ADC; CMOS or LVDS DDR digital outputs
封裝: ADC1112D125HN/C1<SOT804-3|<<<1<Always Pb-free,;ADC1112D125HN/C1<SOT804-3|<<<1<Always Pb-free,;
文件頁數(shù): 34/41頁
文件大?。?/td> 565K
代理商: ADC1112D125HN
ADC1112D125
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 3 March 2011
34 of 41
NXP Semiconductors
ADC1112D125
Dual 11-bit ADC: CMOS or LVDS DDR digital outputs
Table 28.
Default values are highlighted.
Bit
Symbol
7 to 0
TESTPAT_USER[10:3]
Test pattern 2 register (address 0015h) bit description
Access
R/W
Value
0000
0000
Description
custom digital test pattern (bits 10 to 3)
Table 29.
Default values are highlighted.
Bit
Symbol
7 to 5
TESTPAT_USER[2:0]
4 to 0
-
Test pattern 3 register (address 0016h) bit description
Access
R/W
-
Value
000
00000
Description
custom digital test pattern (bits 2 to 0)
not used
Table 30.
Default values are highlighted.
Bit
Symbol
7 to 4
-
3
FASTOTR
Fast OTR register (address 0017h) bit description
Access
-
R/W
Value
0000
Description
not used
fast OuT-of-Range (OTR) detection
disabled
enabled
set fast OTR detect level
20.56 dB
16.12 dB
11.02 dB
7.82 dB
5.49 dB
3.66 dB
2.14 dB
0.86 dB
0
1
2 to 0
FASTOTR_DET[2:0]
R/W
000
001
010
011
100
101
110
111
Table 31.
Default values are highlighted.
Bit
Symbol
7 to 4
-
3 to 2
DAV_DRV[1:]
CMOS output register (address 0020h) bit description
Access
-
R/W
Value
00
Description
not used
drive strength for DAV CMOS output buffer
low
medium
high
very high
drive strength for DATA CMOS output buffer
low
medium
high
very high
00
01
10
11
1 to 0
DATA_DRV[1:0]
R/W
00
01
10
11
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