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參數(shù)資料
| 型號： | PIC24FJ16GA002-I/SS |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 1/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PIC MCU FLASH 16K 28-SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Graphics LCD System and PIC24 Interface Asynchronous Stimulus |
| 特色產(chǎn)品： | PIC24FJ/33FJ MCUs & dsPIC? DSCs |
| 標(biāo)準(zhǔn)包裝： | 47 |
| 系列： | PIC® 24F |
| 核心處理器： | PIC |
| 芯體尺寸： | 16-位 |
| 速度： | 32MHz |
| 連通性： | I²C，PMP，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，LVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 21 |
| 程序存儲器容量： | 16KB（5.5K x 24） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 4K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 10x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 647 (CN2011-ZH PDF) |
| 配用： | DM240011-ND - KIT STARTER MPLAB FOR PIC24F MCU AC162088-ND - HEADER MPLAB ICD2 24FJ64GA004 28 AC164338-ND - MOD SKT PIC24F/DSPIC33F 28SOIC DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2 |
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2008 Microchip Technology Inc.
DS39768D-page 1
PIC24FJXXXGA0XX
1.0
DEVICE OVERVIEW
This document defines the programming specification
for the PIC24FJXXXGA0XX family of 16-bit micro-
controller devices. This programming specification is
required only for those developing programming support
for the PIC24FJXXXGA0XX family. Customers using
only one of these devices should use development
tools
that
already
provide
support
for
device
programming.
This specification includes programming specifications
for the following devices:
2.0
PROGRAMMING OVERVIEW
OF THE PIC24FJXXXGA0XX
FAMILY
There
are
two
methods
of
programming
the
PIC24FJXXXGA0XX family of devices discussed in
this programming specification. They are:
In-Circuit Serial Programming (ICSP)
Enhanced In-Circuit Serial Programming
(Enhanced ICSP)
The ICSP programming method is the most direct
method to program the device; however, it is also the
slower of the two methods. It provides native, low-level
programming capability to erase, program and verify
the chip.
The
Enhanced
In-Circuit
Serial
Programming
(Enhanced ICSP) protocol uses a faster method that
takes advantage of the programming executive, as
illustrated in Figure 2-1. The programming executive
provides all the necessary functionality to erase, pro-
gram and verify the chip through a small command set.
The command set allows the programmer to program
the PIC24FJXXXGA0XX devices without having to
deal with the low-level programming protocols of the
chip.
FIGURE 2-1:
PROGRAMMING SYSTEM
OVERVIEW FOR
ENHANCED ICSP
This specification is divided into major sections that
describe the programming methods independently.
ICSP” describes the Run-Time Self-Programming
(RTSP) method. Section 3.0 “Device Programming –
ICSP” describes the In-Circuit Serial Programming
method.
2.1
Power Requirements
All devices in the PIC24FJXXXGA0XX family are dual
voltage supply designs: one supply for the core and
peripherals and another for the I/O pins. A regulator is
provided on-chip to alleviate the need for two external
voltage supplies.
All of the PIC24FJXXXGA0XX devices power their core
digital logic at a nominal 2.5V. To simplify system
design, all devices in the PIC24FJXXXGA0XX family
incorporate an on-chip regulator that allows the device
to run its core logic from VDD.
PIC24FJ16GA002
PIC24FJ96GA006
PIC24FJ16GA004
PIC24FJ96GA008
PIC24FJ32GA002
PIC24FJ96GA010
PIC24FJ32GA004
PIC24FJ128GA006
PIC24FJ48GA002
PIC24FJ128GA008
PIC24FJ48GA004
PIC24FJ128GA010
PIC24FJ64GA002
PIC24FJ64GA004
PIC24FJ64GA006
PIC24FJ64GA008
PIC24FJ64GA010
PIC24FJXXXGA0XX
Programmer
Programming
Executive
On-Chip Memory
PIC24FJXXXGA0XX Flash Programming Specification
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