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| 型號： | AD9219BCPZ-65 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| 中文描述： | 4-CH 10-BIT FLASH METHOD ADC, SERIAL ACCESS, QCC48 |
| 封裝： | 7 X 7 MM, ROHS COMPLIANT, MO-220VKKD-2, LFCSP-48 |
| 文件頁數(shù)： | 24/52頁 |
| 文件大小： | 1571K |
| 代理商： | AD9219BCPZ-65 |
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AD9219
Rev. 0 | Page 24 of 52
100
50
–0
–0ps
100ps
T
500
–500
0
–1ns
–0.5ns
0ns
0.5ns
1ns
E
EYE: ALL BITS
ULS: 10000/15600
0
Figure 59. Data Eye for LVDS Outputs in ANSI Mode with Trace Lengths Less
than 24 Inches on Standard FR-4
200
–200
0
–1ns
–0.5ns
0ns
0.5ns
1ns
E
EYE: ALL BITS
ULS: 9600/15600
100
50
–0
–100ps
–50ps
–0ps
50ps
100ps
150ps
T
0
Figure 60. Data Eye for LVDS Outputs in ANSI Mode with Trace Lengths
Greater than 24 Inches on Standard FR-4
100
50
–0
–100ps
–50ps
–0ps
50ps
100ps
150ps
T
200
400
–200
–400
0
–1ns
–0.5ns
0ns
0.5ns
1ns
E
EYE: ALL BITS
ULS: 9599/15599
0
Figure 61. Data Eye for LVDS Outputs in ANSI Mode with 100 Ω Termination
on and Trace Lengths Greater than 24 Inches on Standard FR-4
The format of the output data is offset binary by default. An
example of the output coding format can be found in Table 8.
If it is desired to change the output data format to twos
complement, see the Memory Map section.
Table 8. Digital Output Coding
(VIN+) (VIN), Input
Span = 2 V p-p (V)
1023
+1.00
512
0.00
511
0.001953
0
1.00
Code
Digital Output Offset Binary
(D11 ... D0)
1111 1111 11
1000 0000 00
0111 1111 11
0000 0000 00
Data from each ADC is serialized and provided on a separate
channel. The data rate for each serial stream is equal to 10 bits
times the sample clock rate, with a maximum of 650 Mbps
(10 bits × 65 MSPS = 650 Mbps). The lowest typical conversion
rate is 10 MSPS. However, if lower sample rates are required for
a specific application, the PLL can be set up for encode rates
lower than 10 MSPS via the SPI. This allows encode rates as low
as 5 MSPS. See the Memory Map section to enable this feature.
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| AD9219 | Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9219-65EB | Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9219BCPZRL-65 | Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9219BCPZRL-40 | Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9219BCPZ-40 | Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9219BCPZRL-40 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9219BCPZRL-65 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9220 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 12-Bit 1.5/3.0/10.0 MSPS Monolithic A/D Converters |
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| AD9220AR-REEL | 功能描述:IC ADC 12BIT 10MSPS 28-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
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