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參數(shù)資料
型號: MC100EP05MNR4G
廠商: ON Semiconductor
文件頁數(shù): 4/11頁
文件大小: 0K
描述: IC GATE AND/NAND 2INP DIFF 8-DFN
標(biāo)準(zhǔn)包裝: 1,000
系列: 100EP
邏輯類型: 與/與非門
電路數(shù): 1
輸入數(shù): 2 輸入(1,1)
施密特觸發(fā)器輸入:
輸出類型: 差分
電源電壓: 3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-VFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 8-DFN(2x2)
包裝: 帶卷 (TR)
MC10EP05, MC100EP05
http://onsemi.com
2
Figure 1. 8Lead Pinout (Top View) and Logic
Diagram
1
2
3
45
6
7
8
Q
VEE
VCC
D0
Q
D1
D0
Table 1. PIN DESCRIPTION
Pin
Function
D0*, D1*, D0**, D1**
ECL Data Inputs
Q, Q
ECL Data Outputs
VCC
Positive Supply
VEE
Negative Supply
EP
(DFN8 only) Thermal exposed pad
must be connected to a sufficient
thermal conduit. Electrically connect
to the most negative supply (GND) or
leave unconnected, floating open.
* Pins will default LOW when left open.
** Pins will default to VCC/2when left open.
Table 2. TRUTH TABLE
D0
D1
D0
D1
Q
L
H
L
H
L
H
L
H
L
H
L
H
L
Table 3. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
37.5 kW
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 4 kV
> 200 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Pb Pkg
PbFree Pkg
SOIC8
TSSOP8
DFN8
Level 1
Level 3
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V0 @ 0.125 in
Transistor Count
137 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
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