參數(shù)資料
型號(hào)： AD8067ART-REEL
廠商： ANALOG DEVICES INC
元件分類： 運(yùn)動(dòng)控制電子
英文描述： High Gain Bandwidth Product Precision Fast FET⑩ Op Amp
中文描述： OP-AMP, 1000 uV OFFSET-MAX, PDSO5
封裝： PLASTIC, MO-178AA, SOT-23, 5 PIN
文件頁(yè)數(shù)： 3/24頁(yè)
文件大?。?/td> 873K
代理商： AD8067ART-REEL
AD8067
FIGURES
Figure 1. Connection Diagram (Top View)..........................................1
Figure 2. Small Signal Frequency Response.........................................1
Rev. 0 | Page 3 of 24
Figure 3. Maximum Power Dissipation vs. Temperature for
a 4-Layer Board...............................................................................7
Figure 4. Small Signal Frequency Response for Various Gains.........8
Figure 5. Small Signal Frequency Response for Various Supplies.....8
Figure 6. Large Signal Frequency Response for Various Supplies.....8
Figure 7. 0.1 dB Flatness Frequency Response...................................8
Figure 8. Small Signal Frequency Response for Various C
LOAD
.........8
Figure 9. Frequency Response for Various Output Amplitudes........8
Figure 10. Small Signal Frequency Response for Various R
F
.............9
Figure 11. Distortion vs. Frequency for Various Loads ......................9
Figure 12. Distortion vs. Frequency for Various Amplitudes.............9
Figure 13. Open-Loop Gain and Phase ................................................9
Figure 14. Distortion vs. Frequency for Various Supplies..................9
Figure 15. Distortion vs. Output Amplitude for Various Loads........9
Figure 16. Small Signal Transient Response 5 V Supply...................10
Figure 17. Output Overdrive Recovery...............................................10
Figure 18. Long-Term Settling Time...................................................10
Figure 19. Small Signal Transient Response ± 5 V Supply...............10
Figure 20. Large Signal Transient Response.......................................10
Figure 21. 0.1% Short-Term Settling Time........................................10
Figure 22. Input Bias Current vs. Temperature..................................11
Figure 23. Input Offset Voltage Histogram ........................................11
Figure 24. Voltage Noise........................................................................11
Figure 25. Input Bias Current vs. Common-Mode Voltage..............11
Figure 26. Input Offset Voltage vs. Common-Mode Voltage...........11
Figure 27. CMRR vs. Frequency ..........................................................11
Figure 28. Output Impedance vs. Frequency.....................................12
Figure 29. Output Saturation Voltage vs. Output Load Current......12
Figure 30. PSRR vs. Frequency.............................................................12
Figure 31. Quiescent Current vs. Temperature for Various
Supply Voltages..............................................................................12
Figure 32. Output Saturation Voltage vs. Temperature....................12
Figure 33. Open-Loop Gain vs. Load Current for Various
Supplies..........................................................................................12
Figure 34. Standard Test Circuit..........................................................13
Figure 35. Open-Loop Gain Test Circuit...........................................13
Figure 36. Test Circuit for Capacitive Load.......................................13
Figure 37. CMRR Test Circuit.............................................................14
Figure 38. Positive PSRR Test Circuit.................................................14
Figure 39. Output Impedance Test Circuit........................................14
Figure 40. Noninverting Gain Configuration...................................15
Figure 41. Open-Loop Frequency Response....................................15
Figure 42. Inverting Gain Configuration...........................................15
Figure 43. Input and Board Capacitances..........................................16
Figure 44. Op Amp DC Error Sources..............................................17
Figure 45. Simplified Input Schematic.............................................17
Figure 46 Current Limiting Resistor..................................................18
Figure 47. Guard-Ring Configurations..............................................18
Figure 48. Guard-Ring Layout SOT-23-5..........................................18
Figure 49. Wideband Photodiode Preamp.........................................20
Figure 50. Photodiode Voltage Noise Contributions .......................20
Figure 51. Photodiode Preamplifier ...................................................21
Figure 52. Photodiode Preamplifier Frequency Response..............21
Figure 53. Photodiode Preamplifier Pulse Response.......................21
Figure 54. Gain of Less than 2 Schematic..........................................21
Figure 55. Gain of 2 Pulse Response ..................................................22
Figure 56. Single-Supply Operation Schematic ................................22
Figure 57. AD8067/AD8009 Composite ...........................................23
Figure 58. Gain Bandwidth Response................................................23
Figure 59. Large Signal Response........................................................23
Figure 60. Small Signal Response........................................................23
Figure 61. 5-Lead Plastic Surface Mount Package ...........................24
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