參數(shù)資料
型號(hào)： AD8067
廠商： Analog Devices, Inc.
英文描述： High Gain Bandwidth Product Precision Fast FET⑩ Op Amp
中文描述： 高增益帶寬積精密高速運(yùn)算放大器場(chǎng)效應(yīng)⑩
文件頁(yè)數(shù)： 7/24頁(yè)
文件大?。?/td> 873K
代理商： AD8067
AD8067
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Power Dissipation
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature
Operating Temperature Range
Lead Temperature Range
(Soldering 10 sec)
Junction Temperature
Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those
indicated in the operational section of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
Maximum Power Dissipation
Rating
26.4 V
See Figure 3
V
EE
– 0.5 V to V
CC
+ 0.5 V
1.8 V
–65°C to +125°C
–40°C to +85°C
300°C
150°C
The associated raise in junction temperature (T
J
) on the die limits
the maximum safe power dissipation in the AD8067 package. At
approximately 150°C, which is the glass transition temperature, the
plastic will change its properties. Even temporarily exceeding this
temperature limit may change the stresses that the package exerts
on the die, permanently shifting the parametric performance of the
AD8067. Exceeding a junction temperature of 175°C for an
extended period of time can result in changes in the silicon devices,
potentially causing failure.
The power dissipated in the package (
P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive. The quiescent power is the voltage
between the supply pins (
V
S
) times the quiescent current (
I
S
).
Assuming the load (
R
L
) is referenced to midsupply, the total drive
power is
V
S
/2 ×
I
OUT
,
some of which is dissipated in the package
and some in the load (
V
OUT
×
I
OUT
). The difference between the
total drive power and the load power is the drive power dissipated
in the package. RMS output voltages should be considered.
(
)
Power
Load
–
Power
Drive
Total
Power
Quiescent
P
D
+
=
(
)
L
OUT
R
L
OUT
R
S
S
S
D
V
–
V
V
I
V
P
2
2
×
+
×
=
If
R
L
is referenced to
V
S
–
as in single-supply operation, then the
total drive power is
V
S
×
I
OUT
.
If the RMS signal levels are indeterminate, then consider the worst
case, when
V
OUT
=
V
S
/4 for
R
L
to midsupply:
(
)
(
)
L
S
S
S
D
R
/
V
I
V
P
2
4
+
×
=
In single-supply operation with R
L
referenced to
V
S–
,
worst case is
V
OUT
= V
S
/2.
Airflow will increase heat dissipation effectively, reducing θ
JA
. In
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes will
reduce the θ
JA
.
Figure 3 shows the maximum safe power dissipation in the pack-
age versus ambient temperature for the SOT-23-5 (180°C/W)
package on a JEDEC standard 4-layer board. θ
JA
values are
approximations.
It should be noted that for every 10°C rise in temperature, I
B
approximately doubles (See Figure 22).
–40
2.0
1.5
0.5
0
0
AMBIENT TEMPERATURE– °C
M
1.0
–30 –20 –10
80
10
20
30
40
50
60
70
SOT-23-5
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
Rev. 0 | Page 7 of 24
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