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參數(shù)資料
| 型號： | AD8039AR-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Low Power 350 MHz Voltage Feedback Amplifiers |
| 中文描述： | DUAL OP-AMP, 3000 uV OFFSET-MAX, PDSO8 |
| 封裝： | MS-012AA, SOIC-8 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 346K |
| 代理商： | AD8039AR-REEL7 |
REV. B
–4–
AD8038/AD8039
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8038/AD8039 features proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . See Figure 2
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . .
±
V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . .
±
4 V
Storage Temperature . . . . . . . . . . . . . . . . . . –65
°
C to +125
°
C
Operating Temperature Range . . . . . . . . . . . –40
°
C to +85
°
C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300
°
C
*
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8038/AD8039
package is limited by the associated rise in junction temperature (
T
J
)
on the die. The plastic encapsulating the die will locally reach the
junction temperature. At approximately 150
°
C, which is the glass
transition temperature, the plastic will change its properties. Even
temporarily exceeding this temperature limit may change the stresses
that the package exerts on the die, permanently shifting the parametric
performance of the AD8038/AD8039. Exceeding a junction tempera-
ture
of 175
°
C for an extended period of time can result in changes
in the silicon devices, potentially causing failure.
The still-air thermal properties of the package and PCB (
J
A
), ambient
temperature (
T
A
), and total power dissipated in the package (
P
D
)
determine the junction temperature of the die. The junction
temperature can be calculated as follows:
T
T
P
A
D
A
J
=
+
×
(
)
θ
J
The power dissipated in the package (
P
D
) is the sum of the quiescent
power dissipation and the power dissipated in the package due to the
load drive for all outputs. The quiescent power is the voltage between
the supply pins (V
S
) multiplied by the quiescent current (I
S
). Assuming
the load (R
L
) is referenced to midsupply, then the total drive power is
V
S
/ 2
×
I
OUT,
some of which is dissipated in the package and some
in the load (V
OUT
×
I
OUT
). The difference between the total drive
power and the load power is the drive power dissipated in the package.
P
D
= quiescent power + (total drive power – load power)
[
P
V
I
V
V
R
V
R
D
S
S
S
OUT
L
OUT
L
=
×
]
+
(
)
×
(
2
)
[
]
[
]
/
/
–
/
2
AMBIENT TEMPERATURE – C
0
M
1.0
–25
5
35
65
95
125
1.5
2.0
SOIC-8
0.5
SOT23-8
SC70-5
Figure 2. Maximum Power Dissipation vs.
Temperature for a Four-Layer Board
RMS output voltages should be considered. If R
L
is referenced to
V
S–
, as in single-supply operation, then the total drive power is
V
S
I
OUT
.
If the RMS signal levels are indeterminate, then
consider the
worst case, when V
OUT
= V
S
/ 4 for R
L
to midsupply:
(
In single-supply operation with
R
L
referenced to
V
S–
,
worst case is
V
OUT
= V
S
/ 2.
Airflow will increase heat dissipation effectively reducing
JA
. Also,
more metal directly in contact with the package leads from metal traces,
through holes, ground, and power planes, will reduce the
JA
. Care
must be taken to minimize parasitic capacitances at the input leads
of high speed op amps as discussed in the board layout section.
Figure 2 shows the maximum safe power dissipation in the package
versus the ambient temperature for the SOIC-8 (125
°
C/W), SC70-5
(210
°
C/W), and SOT23-8 (160
°
C/W) package on a JEDEC standard
four-layer board.
JA
values are approximations.
P
V
I
V
R
D
S
S
S
L
=
×
)
+
(
)
/
/
4
2
OUTPUT SHORT CIRCUIT
Shorting the output to ground or drawing excessive current from
the AD8038/AD8039 will likely cause a catastrophic failure.
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Outline
Branding Information
AD8038AR
AD8038AR-REEL
AD8038AR-REEL7
AD8038AKS-REEL
AD8038AKS-REEL7
AD8039AR
AD8039AR-REEL
AD8039AR-REEL7
AD8039ART-REEL
*
AD8039ART-REEL7
*
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
5-Lead SC70
5-Lead SC70
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOT23
8-Lead SOT23
SO-8
SO-8
SO-8
KS-5
KS-5
SO-8
SO-8
SO-8
RT-8
RT-8
HUA
HUA
HYA
HYA
*
Under development.
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