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參數(shù)資料
| 型號(hào)： | AD800 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Clock Recovery and Data Retiming Phase-Locked Loop(時(shí)鐘恢復(fù)和重定時(shí)PLL) |
| 中文描述： | 時(shí)鐘恢復(fù)和數(shù)據(jù)重定時(shí)鎖相環(huán)（時(shí)鐘恢復(fù)和重定時(shí)鎖相環(huán)） |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大?。?/td> | 258K |
| 代理商： | AD800 |
AD800/AD802
REV. B
–10–
BYPASS
NETWORK
(A, B, C,
OR D)
MICRO
METALS
T50-10
TO
DEVICE
PINS
6, 7, 9
10, 15,
18
PINS
8, 13,
14
AD802-155
PIN
3
IN
0.47
μ
F
0.47
μ
F
10 TURNS
10
μ
F
5V
50
NOISE IN
SENSE
Figure 25. Power Supply Noise Sensitivity Test Circuit, PECL Configuration
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
–5.2V
DATAOUT
CLKOUT
V
EE
AV
EE
ASUBST
FRAC
SUBST
DATAIN
V
CC1
AV
CC
CF
1
CF
2
DATAOUT
CLKOUT
FRAC
DATAIN
DATAOUT
CLKOUT
DATAOUT
CLKOUT
1
2
3
4
5
6
7
8
Z2
10H116
Z1
AD800/802
J1
J2
R1
R2
100
R5 100
R10
154
C3
R6 100
–5.2V
R9
C4
0.1
R12
154
R11
R7 100
R8 100
R3
100
R4
J3
J4
–5.2V
C5
C2
10
C6
C10
0.1
–5.2V
C
D
R14
80.6
R13
80.6
C7
0.1
–5.2V
0.1
R21
274
R22
274
C8 0.1
C9 0.1
R15
130
R16
130
FRAC
–5.2V
16
15
14
13
12
11
10
9
C11
0.1
R20
130
R19
130
J5
J6
R18
80.6
R17
80.6
DATAIN
DATAIN
–5.2V
–5.2V
—5.2V
C12
V
CC2
V
EE
V
EE
V
CC1
FRAC
Figure 26. Evaluation Board Schematic, Negative Supply
T able II. E valuation Board, Negative Supply: Components List
Reference
Designator
Description
Quantity
R1–8
R9–12
R13, 14, 17, 18
R15, 16, 19, 20
R21, 22
C
D
C2
C3–C12
Z1
Z2
Resistor, 100
, 1%
Resistor, 154
, 1%
Resistor, 80.6
, 1%
Resistor, 130
, 1%
Resistor, 274
, 1%
Capacitor, Loop Damping (See Specifications Page)
Capacitor, 10
μ
F, T antalum
Capacitor, 0.1
μ
F, Ceramic Chip
AD800/AD802
10H116, ECL Line Receiver
8
4
4
4
2
1
1
10
1
1
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