參數(shù)資料
型號: AD7862
廠商: Analog Devices, Inc.
英文描述: Simultaneous Sampling Dual 250 kSPS 12-Bit ADC(同時(shí)采樣250kSPS 12位雙A/D轉(zhuǎn)換器)
中文描述: 雙同步采樣250 kSPS的12位ADC(同時(shí)采樣AD7691的12位雙的A / D轉(zhuǎn)換器)
文件頁數(shù): 12/16頁
文件大?。?/td> 372K
代理商: AD7862
AD7862
–12–
REV. 0
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa
±
nfb where
m, n = 0, 1, 2, 3 . . ., etc. Intermodulation terms are those for
which neither m or n are equal to zero. For example, the second
order terms include (fa + fb) and (fa – fb) while the third order
terms include (2 fa + fb), (2 fa – fb), (fa + 2 fb) and (fa – 2 fb).
Using the CCIF standard where two input frequencies near the
top end of the input bandwidth are used, the second and third
order terms are of different significance. The second order terms
are usually distanced in frequency from the original sine waves
while the third order terms are usually at a frequency close to
the input frequencies. As a result, the second and third order
terms are specified separately. The calculation of the inter-
modulation distortion is as per the THD specification where it is
the ratio of the rms sum of the individual distortion products to
the rms amplitude of the fundamental expressed in dBs. In this
case the input consists of two, equal amplitude, low distortion
sine waves. Figure 11 shows a typical IMD plot for the AD7862.
–0
–120
0
12.3k
10k
30k
50k
70k
90k
–20
–40
–60
–80
–100
–10
–30
–50
–70
–90
–110
100k
INPUT FREQUENCIES
F1 = 50010 Hz
F2 = 49110 Hz
F
= 245760 Hz
SNR = –60.62dB
THD = –89.22dB
IMD:
2ND ORDER TERM –88.44 dB
3RD ORDER TERM –66.20 dB
Figure 11. AD7862 IMD Plot
Peak Harmonic or Spurious Noise
Harmonic or spurious noise is defined as the ratio of the rms
value of the next largest component in the ADC output spec-
trum (up to f
S
/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification will be
determined by the largest harmonic in the spectrum, but for
parts where the harmonics are buried in the noise floor, the peak
will be a noise peak.
AC Linearity Plot
When a sine wave of specified frequency is applied to the V
IN
input of the AD7862, and several million samples are taken, a
histogram showing the frequency of occurrence of each of the
4096 ADC codes can be generated. From this histogram data, it
is possible to generate an ac integral linearity plot as shown in
Figure 12. This shows very good integral linearity performance
from the AD7862 at an input frequency of 10 kHz. The absence
of large spikes in the plot shows good differential linearity. Sim-
plified versions of the formulas used are outlined below.
INL
(
i
)
=
V i
( )
V o
( )
×
4096
V f
S
(
)
)
V o
( )
i
where
INL
(
i
) is the integral linearity at code i.
V
(
f
S
) and
V
(
o
)
are the estimated full-scale and offset transitions, and
V
(
i
) is the
estimated transition for the i
th
code.
V
(
i
), the estimated code transition point is derived as follows:
V
(
i
)
=
A
×
Cos
π ×
cum i
( )
N
where
A
is the peak signal amplitude,
N
is the number of
histogram samples
and cum i
( )
=
V n
( )
0
i
occurrences
0
–0.1
–0.2
–0.3
–0.4
–0.5
0.5
0.4
0.3
0.2
0.1
LSB
F
IN
= 10 kHz
F
IN
= 245.760 kHz
T
A
= 25
°
C
Figure 12. AD7862 AC INL Plot
Power Considerations
In the automatic power-down mode the part may be operated at
a sample rate that is considerably less than 200 kHz. In this
case, the power consumption will be reduced and will depend
on the sample rate. Figure 13 shows a graph of the power
consumption versus sampling rates from 100 Hz to 90 kHz in
the automatic power-down mode. The conditions are 5 V
supply 25
°
C, and the data was read after conversion.
0.1
90
10
20
30
40
0
25
20
15
10
35
30
40
5
FREQUENCY – kHz
P
50
60
70
80
Figure 13. Power vs. Sample Rate in Auto Power-Down
Mode
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