參數(shù)資料
型號: AD7856AR
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 5 V Single Supply, 8-Channel 14-Bit 285 kSPS Sampling ADC
中文描述: 8-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24
封裝: SOIC-24
文件頁數(shù): 11/32頁
文件大?。?/td> 294K
代理商: AD7856AR
AD7856
–11–
REV. A
Table III. Channel Selection
SGL/
DIFF
CH2
CH1
CH0
AIN(+)*
AIN(–)*
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
AIN
1
AIN
3
AIN
5
AIN
7
AIN
2
AIN
4
AIN
6
AIN
8
AIN
1
AIN
3
AIN
5
AIN
7
AIN
2
AIN
4
AIN
6
AIN
8
AIN
2
AIN
4
AIN
6
AIN
8
AIN
1
AIN
3
AIN
5
AIN
7
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
*AIN(+) refers to the positive input seen by the AD7856 sample and hold circuit.
AIN(–) refers to the negative input seen by the AD7856 sample and hold circuit.
Table IV. Calibration Selection
CALMD
CALSLT1
CALSLT0
Calibration Type
0
0
0
A Full Internal Calibration is initiated where the Internal DAC is calibrated
followed by the Internal Gain Error, and finally the Internal Offset Error is
calibrated out. This is the default setting.
Here the Internal Gain Error is calibrated out followed by the Internal Offset
Error calibrated out.
This calibrates out the Internal Offset Error
only.
This calibrates out the Internal Gain Error
only.
A Full System Calibration is initiated here where first the Internal DAC is
calibrated followed by the System Gain Error, and finally the System Offset
Error is calibrated out.
Here the System Gain Error is calibrated out followed by the System Offset
Error.
This calibrates out the System Offset Error only.
This calibrates out the System Gain Error only.
0
0
1
0
0
1
1
1
0
0
1
0
1
0
1
1
1
1
1
0
1
相關PDF資料
PDF描述
AD7856ARS 5 V Single Supply, 8-Channel 14-Bit 285 kSPS Sampling ADC
AD7856KR 5 V Single Supply, 8-Channel 14-Bit 285 kSPS Sampling ADC
AD7856 8-Channel 14 Bit 285 kSPS Sampling ADC(單電源,8通道14位采樣A/D轉換器)
AD7858L 3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADC(單電源,200kSPS 8通道12位采樣A/D轉換器)
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