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參數(shù)資料
| 型號： | AD7855 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 3 V to 5 V Single Supply, 600 kSPS 12-Bit Sampling ADCs(單電源,600kSPS12位采樣A/D轉(zhuǎn)換器) |
| 中文描述： | 3 V至5 V單電源，600 kSPS的12位采樣ADC（單電源，600kSPS12位采樣的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 3/3頁 |
| 文件大?。?/td> | 175K |
| 代理商： | AD7855 |
PRELIMINARY TECHNICAL DATA
AD7855
Prelim. A 12/97
3
Parameter
A Version
1
Units
Test Conditions/Comments
POWER REQUIREMENTS
AV
DD,
DV
DD
I
DD
Normal Mode
5
+3.0/+5.5
V min/max
15
mA max
AV
DD
= DV
DD
= 3.0 V to 5.5 V. Typically 12 mA
Sleep Mode
6
With External Clock On
10
μA typ
Full power-down. Power management bits in control
register set as PMGT1 = 1, PMGT0 = 0.
Partial power-down. Power management bits in
control register set as PMGT1 = 1, PMGT0 = 1.
Typically 1 μA. Full power-down. Power management
bits in control register set as PMGT1 = 1,
PMGT0 = 0.
Partial power-down. Power management bits in
control register set as PMGT1 = 1, PMGT0 = 1.
V
DD
= 5.5 V: Typically 55 mW
V
DD
= 3.6 V: Typically 30 mW
400
μA typ
With External Clock Off
5
μA max
200
μA typ
Normal Mode Power Dissipation
75
45
mW max
mW max
Sleep Mode Power Dissipation
With External Clock On
55
36
27.5
18
μW typ
μW typ
μW max
μW max
V
DD
= 5.5 V
V
DD
= 3.6 V
V
DD
= 5.5 V: Typically 5.5 μW
V
DD
= 3.6 V: Typically 3.6 μW
With External Clock Off
SYSTEM CALIBRATION
Offset Calibration Span
7
Gain Calibration Span
7
+0.05
∞
V
REF
/–0.05
∞
V
REF
+0.025
∞
V
REF
/–0.025
∞
V
REF
V max/min
V max/min
Allowable Offset Voltage Span for Calibration
Allowable Full-Scale Voltage Span for Calibration
NOTES
1
Temperature range –40°C to +85°C.
2
Specifications apply after calibration.
3
Not production tested. Guaranteed by characterization at initial product release.
4
Sample tested @ +25°C to ensure compliance.
5
All digital inputs @ DGND except for
CONVST
@ DV
. No load on the digital outputs. Analog inputs @ AGND.
6
CLKIN @ DGND when external clock off. All digital inputs @ DGND except for
CONVST
@ DV
DD
. No load on the digital outputs. Analog inputs @
AGND.
7
The offset and gain calibration spans are defined as the range of offset and gain errors that the AD7855 can calibrate. Note also that these are voltage spans and
are not absolute voltages (i.e., the allowable system offset voltage presented at AIN(+) for the system offset error to be adjusted out will be AIN(–) ±0.05
∞
V
, and the allowable system full-scale voltage applied between AIN(+) and AIN(–) for the system full-scale voltage error to be adjusted out will be V
REF
±
0.025
∞
V
REF
(unipolar mode) and V
REF
/2 ± 0.025
∞
V
REF
(bipolar mode)). This is explained in more detail in the calibration section of the data sheet.
Specifications subject to change without notice.
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| AD7856ANZ | 功能描述:IC ADC 14BIT 8CHAN 5V 24DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7856AR | 功能描述:IC ADC 14BIT 8CH 5V 24-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
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