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參數(shù)資料
| 型號： | AD7837 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Complete, Dual 12-Bit MDACs(完備的雙12位乘法D/A轉(zhuǎn)換器) |
| 中文描述： | 完備的雙12位醫(yī)療儀器行政管理制度（完備的雙12位乘法的D / A轉(zhuǎn)換器） |
| 文件頁數(shù)： | 4/12頁 |
| 文件大小： | 280K |
| 代理商： | AD7837 |
AD7837/AD7847
REV. 0
–4–
T E RMINOLOGY
Relative Accuracy (Linearity)
Relative accuracy, or endpoint linearity, is a measure of the
maximum deviation of the DAC transfer function from a
straight line passing through the endpoints. It is measured after
allowing for zero and full-scale errors and is expressed in LSBs
or as a percentage of full-scale reading.
Differential Nonlinearity
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of
±
1 LSB or less
over the operating temperature range ensures monotonicity.
Zero Code Offset E rror
Zero code offset error is the error in output voltage from V
OUT A
or V
OUT B
with all 0s loaded into the DAC latches. It is due to a
combination of the DAC leakage current and offset errors in the
output amplifier.
Gain E rror
Gain error is a measure of the output error between an ideal
DAC and the actual device output with all 1s loaded. It does
not include offset error.
T otal Harmonic Distortion
T his is the ratio of the root-mean-square (rms) sum of the har-
monics to the fundamental, expressed in dBs.
Multiplying Feedthrough E rror
T his is an ac error due to capacitive feedthrough from the V
REF
input to V
OUT
of the same DAC when the DAC latch is loaded
with all 0s.
Channel-to-Channel Isolation
T his is an ac error due to capacitive feedthrough from the V
REF
input on one DAC to V
OUT
on the other DAC. It is measured
with the DAC latches loaded with all 0s.
Digital Feedthrough
Digital feedthrough is the glitch impulse injected from the digi-
tal inputs to the analog output when the data inputs change
state, but the data in the DAC latches is not changed.
For the AD7837, it is measured with
LDAC
held high. For the
AD7847, it is measured with
CSA
and
CSB
held high.
Digital Crosstalk
Digital crosstalk is the glitch impulse transferred to the output
of one converter due to a change in digital code on the DAC
latch of the other converter. It is specified in nV secs.
Digital-to-Analog Glitch Impulse
T his is the voltage spike that appears at the output of the DAC
when the digital code changes, before the output settles to its fi-
nal value. T he energy in the glitch is specified in nV secs and is
measured for a 1 LSB change around the major carry transition
(0111 1111 1111 to 1000 0000 0000).
Unity Gain Small Signal Bandwidth
T his is the frequency at which the small signal voltage output
from the output amplifier is 3 dB below its dc level. It is mea-
sured with the DAC latch loaded with all 1s.
Full Power Bandwidth
T his is the maximum frequency for which a sinusoidal input
signal will produce full output at rated load with a distortion
less than 3%. It is measured with the DAC latch loaded with
all 1s.
AD7837 PIN FUNCT ION DE SCRIPT ION (DIP & SOIC PIN NUMBE RS)
Pin
Mnemonic
Description
1
2
3
4
5
6
7
8
9
10
11
12
13
CS
R
FBA
V
REFA
V
OUT A
AGNDA
V
DD
V
SS
AGNDB
V
OUT B
V
REFB
DGND
R
FBB
WR
Chip Select. Active low logic input. T he device is selected when this input is active.
Amplifier Feedback Resistor for DAC A.
Reference Input Voltage for DAC A. T his may be an ac or dc signal.
Analog Output Voltage from DAC A.
Analog Ground for DAC A.
Positive Power Supply.
Negative Power Supply.
Analog Ground for DAC B.
Analog Output Voltage from DAC B.
Reference Input Voltage for DAC B. T his may be an ac or dc signal.
Digital Ground. Ground reference for digital circuitry.
Amplifier Feedback Resistor for DAC B.
Write Input.
WR
is an active low logic input which is used in conjunction with
CS
, A0 and A1 to
write data to the input latches.
DAC Update Logic Input. Data is transferred from the input latches to the DAC latches when
LDAC
is taken low.
Address Input. Most significant address input for input latches (see T able II).
Address Input. Least significant address input for input latches (see T able II).
Data Bit 7 to Data Bit 4.
Data Bit 3 to Data Bit 0 (LSB) or Data Bit 11 (MSB) to Data Bit 8.
14
LDAC
15
16
17–20
21–24
A1
A0
DB7–DB4
DB3–DB0
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| AD7837AN | 功能描述:IC DAC 12BIT MULT DUAL 24-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD7837AN/883B | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Complete, Dual 12-Bit MDACs |
| AD7837AN883B | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Complete, Dual 12-Bit MDACs |
| AD7837AN-883B | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Complete, Dual 12-Bit MDACs |
| AD7837ANN | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Complete, Dual 12-Bit MDACs |
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