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參數(shù)資料
| 型號： | AD7836 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Quad 14-Bit DAC(14位四通道D/A轉(zhuǎn)換器) |
| 中文描述： | 四路14位DAC（14位四通道的D / A轉(zhuǎn)換器） |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 168K |
| 代理商： | AD7836 |
AD7836
–5–
REV. 0
PIN DE SCRIPT ION
Pin Mnemonic
Description
V
CC
V
SS
V
DD
DGND
AGND
V
REF
(+)A, V
REF
(–)A
V
REF
(+)B, V
REF
(–)B
V
REF
(+)C, V
REF
(–)C
V
REF
(+)D, V
REF
(–)D
V
OUT
A . . . V
OUT
D
CS
DB0 . . . DB13
Logic Power Supply; +5 V
±
5%.
Negative Analog Power Supply; –15 V
±
5%.
Positive Analog Power Supply; +15 V
±
5%.
Digital Ground.
Analog Ground.
Reference Inputs for DAC A. T hese reference voltages are referred to AGND.
Reference Inputs for DAC B. T hese reference voltages are referred to AGND.
Reference Inputs for DAC C. T hese reference voltages are referred to AGND.
Reference Inputs for DAC D. T hese reference voltages are referred to AGND.
DAC Outputs.
Level-T riggered Chip Select Input (active low). T he device is selected when this input is low.
Parallel Data Inputs. T he AD7836 can accept a straight 14-bit parallel word on DB0 to DB13 where
DB13 is the MSB and DB0 is the LSB.
Address inputs. A0, A1 and A2 are decoded to select one of the five input latches for a data transfer.
Asynchronous Clear Input (level sensitive, active low). When this input is low, all analog outputs are
switched to the externally set potential on the DUT GND pin. T he contents of data registers A to E are
not affected when the
CLR
pin is taken low. When
CLR
is brought back high, the DAC outputs revert
back to their original outputs as determined by the data in their data registers.
Level-T riggered Write Input (active low), when active and used in conjunction with
CS
to write data to
the AD7836 input buffer. Data is latched into the selected data register on the rising edge of
WR
.
Device Sense Ground for DAC A. Vout A is referenced to the voltage applied to this pin.
Device Sense Ground for DAC B. Vout B is referenced to the voltage applied to this pin.
Device Sense Ground for DAC C. Vout C is referenced to the voltage applied to this pin.
Device Sense Ground for DAC D. Vout D is referenced to the voltage applied to this pin.
Select pin, active high level triggered input. When the SEL input is high, the user programmed value in
DAT AREG E will be loaded into all DAC registers and the DAC outputs updated accordingly. T he con-
tents of the other DAT A REGs (A–D) will not be affected by the SEL pin.
A0, A1, A2
CLR
WR
DUT GND A
DUT GND B
DUT GND C
DUT GND D
SEL
PIN CONFIGURAT ION
12
13
14
15
16
17
18
19
21
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
AD7836
NC = NO CONNECT
20
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
1
2
3
4
5
6
7
8
9
10 11
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DGND
V
CC
CLR
V
OUT
C
V
REF
(–)C
V
REF
(+)C
AGND
NC
V
DD
NC
V
SS
V
REF
(+)A
V
REF
(–)A
V
OUT
A
D
V
R
(
V
R
(
V
O
D
D
D
D
D
D
D
D
D
V
R
(
V
R
(
V
O
B
D
A
A
A
S
C
W
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7836AS | 制造商:Analog Devices 功能描述:DAC 4-CH R-2R 14-bit 44-Pin MQFP 制造商:Analog Devices 功能描述:IC 14-BIT DAC |
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| AD7837 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Complete, Dual 12-Bit MDACs |
| AD7837AN | 功能描述:IC DAC 12BIT MULT DUAL 24-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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