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參數(shù)資料
| 型號： | AD7822 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 1-Channel Sampling ADCs(2MSPS,單通道采樣8位A/D轉(zhuǎn)換器) |
| 中文描述： | 單通道采樣ADC（2MSPS，單通道采樣8位的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 238K |
| 代理商： | AD7822 |
AD7822/AD7825/AD7829
–9–
REV. 0
AD7822/25/29
V
REF
V
MID
V
IN
2.5V
R3
R4
R2
R1
V
V
0V
V
IN
0V
2.5V
Figure 9. Accommodating Bipolar Signals Using
External V
MID
AD7822/25/29
V
REF
V
MID
V
IN
EXTERNAL
2.5V
R3
R4
R2
R1
V
V
0V
V
IN
0V
V
MID
Figure 10. Accommodating Bipolar Signals Using
Internal V
MID
NOT E: Although there is a V
REF
pin from which a voltage
reference of 2.5 V may be sourced, or to which an external
reference may be applied, this does not provide an option of
varying the value of the voltage reference. As stated in the
specifications for the AD7822, AD7825 and AD7829, the input
voltage range at this pin is 2.5 V
±
2%.
Analog Input Structure
Figure 11 shows an equivalent circuit of the analog input struc-
ture of the AD7822, AD7825 and the AD7829. T he two diodes,
D1 and D2, provide ESD protection for the analog inputs.
Care must be taken to ensure that the analog input signal never
exceeds the supply rails by more than 200 mV. T his will cause
these diodes to become forward biased and start conducting
current into the substrate. 20 mA is the maximum current these
diodes can conduct without causing irreversible damage to the
part. However, it is worth noting that a small amount of current
(1 mA) being conducted into the substrate due to an over volt-
age on an unselected channel, can cause inaccurate conversions
on a selected channel. T he capacitor C2 in Figure 11 is typically
about 4 pF and can be primarily attributed to pin capacitance.
T he resistor, R1, is a lumped component made up of the on
resistance of several components, including that of the multi-
plexer and the track and hold. T his resistor is typically about
310
. T he capacitor C1 is the track-and-hold capacitor and has
a capacitance of 0.5 pF. Switch 1 is the track-and-hold switch,
while Switch 2 is that of the sampling capacitor as shown in
Figures 2 and 3.
When in track phase, Switch 1 is closed and Switch 2 is in
Position A; when in hold mode, Switch 1 opens while Switch
2 remains in Position A. T he track-and-hold remains in hold
mode for 120 ns—see Circuit Description, after which it returns
to track mode and the ADC enters its conversion phase. At this
point Switch 1 opens and Switch 2 moves to Position B. At the
end of the conversion Switch 2 moves back to Position A.
V
IN
C2
4pF
D1
D2
R1
310
V
SW1
C1
0.5pFA
B
SW2
V
DD
Figure 11. Equivalent Analog Input Circuit
Analog Input Selection
On power-up, the default V
IN
selection is V
IN1
. When returning
to normal operation from power-down, the V
IN
selected will be
the same one that was selected prior to power-down being initi-
ated. T able II below shows the multiplexer address correspond-
ing to each analog input from V
IN1
to V
IN4(8)
for the AD7825 or
AD7829.
T able II.
A2
A1
A0
Analog Input Selected
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
V
IN1
V
IN2
V
IN3
V
IN4
V
IN5
V
IN6
V
IN7
V
IN8
Channel selection on the AD7825 and AD7829 is made without
the necessity of a write operation. T he address of the
next
chan-
nel to be converted is latched at the start of the
current
read
operation, as shown in Figure 12. T his allows for improved
throughput rates in “channel hopping” applications.
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