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| 型號(hào)： | AD5764RCSUZ-REEL7 |
| 廠(chǎng)商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 24/32頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC QUAD 16BIT VOUT 32-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 產(chǎn)品變化通告： | AD5764(R), AD5744R Product Change 04/Sept/2009 |
| 設(shè)計(jì)資源： | High Accuracy, Bipolar Voltage Output Digital-to-Analog Conversion Using AD5764 (CN0006) |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 設(shè)置時(shí)間： | 8µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 275 mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類(lèi)型： | 4 電壓，雙極 |
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AD5764R
Data Sheet
Rev. D | Page 30 of 32
LAYOUT GUIDELINES
In any circuit where accuracy is important, careful considera-
tion of the power supply and ground return layout helps to
ensure the rated performance. Design the PCB on which the
AD5764R is mounted such that the analog and digital sections
are separated and confined to certain areas of the board. If the
AD5764R is in a system where multiple devices require an
AGNDx-to-DGND connection, establish the connection at one
point only. Establish the star ground point as close as possible to
the device. The AD5764R should have ample supply bypassing of
10 F in parallel with 0.1 F on each supply located as close to
the package as possible, ideally right up against the device. The
10 F capacitors are of the tantalum bead type. The 0.1 F
capacitor should have low effective series resistance (ESR) and low
effective series inductance (ESI), such as the common ceramic
types that provide a low impedance path to ground at high
frequencies to handle transient currents due to internal logic
switching.
The power supply lines of the AD5764R should use as large a trace
as possible to provide low impedance paths and reduce the effects
of glitches on the power supply line. Shield fast-switching signals,
such as clocks, with digital ground to avoid radiating noise to other
parts of the board; they should never be run near the reference
inputs. A ground line routed between the SDIN and SCLK lines
helps reduce cross talk between them. (A ground line is not
required on a multilayer board because it has a separate ground
plane; however, it is helpful to separate the lines.) It is essential to
minimize noise on the reference inputs because it couples
through to the DAC output. Avoid crossover of digital and
analog signals. Run traces on opposite sides of the board at right
angles to each other to reduce the effects of feedthrough on the
board. A microstrip technique is recommended but not always
possible with a double-sided board. In this technique, the com-
ponent side of the board is dedicated to the ground plane, and
the signal traces are placed on the solder side.
GALVANICALLY ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
any hazardous common-mode voltages that may occur. Iso-
couplers provide voltage isolation in excess of 2.5 kV. The serial
loading structure of the AD5764R makes it ideal for isolated
interfaces because the number of interface lines is kept to a mini-
mum. Figure 44 shows a 4-channel isolated interface to the
AD5764R using an ADuM1400 iCoupler product. For more
information on iCoupler products, refer to www.analog.com.
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5764R is accomplished via
a serial bus that uses standard protocol that is compatible with
microcontrollers and DSP processors. The communication
channel is a 3-wire (minimum) interface consisting of a clock
signal, a data signal, and a synchronization signal. The AD5764R
requires a 24-bit data-word with data valid on the falling edge
of SCLK.
For all the interfaces, a DAC output update can be performed
automatically when all the data is clocked in, or it can be done
under the control of LDAC. The contents of the DAC register
can be read using the readback function.
VIA
SERIAL CLOCK OUT
TO SCLK
VOA
ENCODE
DECODE
VIB
SERIAL DATA OUT
TO SDIN
VOB
ENCODE
DECODE
VIC
SYNC OUT
TO SYNC
VOC
ENCODE
DECODE
VID
CONTROL OUT
TO LDAC
VOD
ENCODE
DECODE
MICROCONTROLLER
ADuM1400*
*ADDITIONAL PINS OMITTED FOR CLARITY.
06064-
065
Figure 44. Isolated Interface
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| AD5764SSUZ-EP-RL7 | 功能描述:16 Bit Digital to Analog Converter 4 32-TQFP (7x7) 制造商:analog devices inc. 系列:iCMOS? 包裝:剪切帶（CT） 零件狀態(tài):有效 位數(shù):16 數(shù)模轉(zhuǎn)換器數(shù):4 建立時(shí)間:10μs 輸出類(lèi)型:Voltage - Buffered 差分輸出:無(wú) 數(shù)據(jù)接口:SPI，DSP 參考類(lèi)型:外部 電壓 - 電源，模擬:±11.4 V ~ 16.5 V 電壓 - 電源，數(shù)字:2.7 V ~ 5.25 V INL/DNL（LSB）:±2（最大），±1（最大） 架構(gòu):R-2R 工作溫度:-55°C ~ 125°C 封裝/外殼:32-TQFP 供應(yīng)商器件封裝:32-TQFP（7x7） 標(biāo)準(zhǔn)包裝:1 |
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| AD5765BSUZ | 功能描述:IC DAC 16BIT +/-5V QUAD 2LSB 32L RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-LCC（J 形引線(xiàn)） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類(lèi)型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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