參數(shù)資料
型號: 93LC46AXT-I/OTG
元件分類: PROM
英文描述: 128 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO6
封裝: LEAD FREE, PLASTIC, SC-74A, SOT-23, 6 PIN
文件頁數(shù): 2/28頁
文件大?。?/td> 420K
代理商: 93LC46AXT-I/OTG
93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
DS21749F-page 10
2005 Microchip Technology Inc.
2.8
Write
The WRITE instruction is followed by 8 bits (if ORG is
low or A-version devices) or 16 bits (if ORG pin is high
or B-version devices) of data which are written into the
specified address. For 93AA46A/B/C and 93LC46A/B/C
devices, after the last data bit is clocked into DI, the
falling edge of CS initiates the self-timed auto-erase and
programming cycle. For 93C46A/B/C devices, the self-
timed auto-erase and programming cycle is initiated by
the rising edge of CLK on the last data bit.
The DO pin indicates the Ready/Busy status of the
device, if CS is brought high after a minimum of 250 ns
low (TCSL). DO at logical ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
FIGURE 2-8:
WRITE TIMING FOR 93AA AND 93LC DEVICES
FIGURE 2-9:
WRITE TIMING FOR 93C DEVICES
Note:
After the Write cycle is complete, issuing a
Start bit and then taking CS low will clear
the Ready/Busy status from DO.
CS
CLK
DI
DO
1
0
1
An
A0
Dx
D0
Busy
Ready
High-Z
TWC
TCSL
TCZ
TSV
CS
CLK
DI
DO
1
0
1
An
A0
Dx
D0
Busy
Ready
High-Z
TWC
TCSL
TCZ
TSV
相關PDF資料
PDF描述
93AA46A-I/MCG 128 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8
93C46AX-I/MCG 128 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8
93LC46AXT-E/OTG 128 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO6
93LC46A-I/MCG 128 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8
93AA46BXT-I/MCG 64 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8
相關代理商/技術參數(shù)
參數(shù)描述
93LC46B 制造商:Panasonic Industrial Company 功能描述:IC
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