參數(shù)資料
型號(hào)： 8XC51FB
廠商： NXP Semiconductors N.V.
英文描述： Low power single card reader
中文描述： 低功耗單卡讀卡器
文件頁(yè)數(shù)： 31/58頁(yè)
文件大?。?/td> 233K
代理商： 8XC51FB
2003 Oct 30
31
Philips Semiconductors
Product specification
Low power single card reader
TDA8029
8.10.2
ISO UART
REGISTERS
8.10.2.1
UART Transmit Register (UTR)
Table 44
UART transmit register, address Dh, write
Table 45
Description of register bits
75
Counter 1 is an 8-bit auto-reload counter, and counters 3 and 2 form a 16-bit counter. After 75h is written
in register TOC, counter 1 starts counting the content of register TOR1 on the first start-bit (reception or
transmission) detected on pin I/O. When counter 1 reaches its terminal count, an interrupt is given, bit
TO1 in register USR is set and the counter automatically restarts the same count until it is stopped.
Changing the content of register TOR1 during a count is not allowed. Counting the value stored in
registers TOR3 and TOR2 is started on the first start-bit detected on pin I/O (reception or transmission)
after 75h is written, and then on each subsequent start-bit. It is possible to change the content of
registers TOR3 and TOR2 during a count, the current count will not be affected and the new count value
will be taken into account at the next start-bit. The counter is stopped by writing 00h in register TOC. In
this configuration, registers TOR3, TOR2 and TOR1 must not be all zero.
Counters 3, 2 and 1 are wired as a single 24-bit counter. Counting the value stored in registers TOR3,
TOR2 and TOR1 is started on the first start-bit detected on pin I/O (reception or transmission) after the
value has been written, and then on each subsequent start-bit. It is possible to change the content of
registers TOR3, TOR2 and TOR1 during a count. The current count will not be affected and the new
count value will be taken into account at the next start-bit. The counter is stopped by writing 00h in
register TOC. In this configuration, registers TOR3, TOR2 and TOR1 must not be all zero.
Same as value 05h, except that all the counters will be stopped at the end of the 12th ETU following the
first received start-bit detected after 85h has been written in register TOC.
Same configuration as value 65h, except that counter 1 will be stopped at the end of the 12th ETU
following the first start-bit detected after E5h has been written in register TOC.
Same configuration as value 71h, except that the 16-bit counter will be stopped at the end of the 12th
ETU following the first start-bit detected after F1h has been written in register TOC.
Same configuration as value 75h, except the two counters will be stopped at the end of the 12th ETU
following the first start-bit detected after F5h has been written in register TOC.
7C
85
E5
F1
F5
BIT
7
6
5
4
3
2
1
0
Symbol
Reset value
UT7
0
UT6
0
UT5
0
UT4
0
UT3
0
UT2
0
UT1
0
UT0
0
BIT
SYMBOL
DESCRIPTION
7 to 0
UT[7:0]
UART transmit bits.
When the microcontroller wants to transmit a character to the card,
it writes the data in direct convention in this register. The transmission:
Starts at the end of writing (on the rising edge of signal WR) if the previous character
has been transmitted and if the extra guard time has expired
Starts at the end of the extra guard time if this one has not expired
Does not start if the transmission of the previous character is not completed
With a synchronous card (bit SAN within register UCR2 is set), only UT0 is relevant and
is copied on pin I/O of the card.
TOC [7:0]
(HEX)
OPERATING MODE
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