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參數(shù)資料
| 型號： | 8XC51FB |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Low power single card reader |
| 中文描述： | 低功耗單卡讀卡器 |
| 文件頁數(shù)： | 28/58頁 |
| 文件大?。?/td> | 233K |
| 代理商： | 8XC51FB |
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2003 Oct 30
28
Philips Semiconductors
Product specification
Low power single card reader
TDA8029
8.10.1
G
ENERAL REGISTERS
8.10.1.1
Card Select Register (CSR)
This register is used for resetting the ISO UART.
Table 32
Card select register, address 0h, read and write
Table 33
Description of register bits
8.10.1.2
Hardware Status Register (HSR)
This register gives the status of the chip after a hardware problem has been signalled or when pin SDWN_N has been
activated.
When PRTL1, PRL1, PTL or SDWN is logic 1, then pin INT0_N is LOW. The bits having caused the interrupt are cleared
when HSR is read (two f
int
cycles after the rising edge of signal RD).
In case of emergency deactivation by PRTL1, SUPL, PRL1 and PTL, bit START in the power control register is
automatically reset by hardware.
Table 34
Hardware Status Register, address Fh, read
Table 35
Description of register bits
BIT
7
0
6
0
5
0
4
0
3
2
0
1
0
0
0
Symbol
Reset value
RIU
0
BIT
SYMBOL
DESCRIPTION
7 to 4
3
RIU
Not used.
Reset ISO UART.
If RIU = 0, this bit resets a large part of the UART registers to their
initial value. Bit RIU must be reset to logic 0 for at least 10 ns duration before any
activation. Bit RIU must be set to logic 1 by software before any action on the UART can
take place.
Not used.
2 to 0
BIT
7
6
0
5
4
3
0
2
1
0
0
Symbol
Reset value
SDWN
PRTL1
0
SUPL
0
PRL1
0
PTL
0
BIT
SYMBOL
DESCRIPTION
7
SDWN
Enter shut-down mode.
This bit is used for entering the shut-down mode. SDWN is set
when the SDWN_N pin is active (LOW). When the software reads the status, it must:
Deactivate the card if active
Set all ports to logic 1 (for minimizing the current consumption)
Inhibit the interrupts
Go to Power-down mode.
The same must be done when the chip is powered-on with SDWN_N pin active.
The only way to leave shut-down mode is when pin SDWN_N is HIGH.
Not used.
6
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