參數(shù)資料
型號： 8XC51FA
廠商： NXP Semiconductors N.V.
英文描述： 8-bit CMOS (low voltage, low power and high speed) microcontroller families
中文描述： 8位CMOS（低電壓，低功耗和高速）微控制器系列
文件頁數(shù)： 22/55頁
文件大?。?/td> 361K
代理商： 8XC51FA
Philips Semiconductors
Preliminary specification
8XC52/54/58/80C32
8XC51FA/FB/FC/80C51FA
8XC51RA+/RB+/RC+/RD+/80C51RA+
8-bit CMOS (low voltage, low power
and high speed) microcontroller families
1997 Dec 01
196
Interrupt Priority Structure
The 8XC51FA/FB/FC and 8XC51RA+/RB+/RC+/RD+ have a
7-source four-level interrupt structure (see Table 7). The
80C52/54/58 and 80C32 only have a 6-source four-level interrupt
structure because these devices do not have a PCA.
There are 3 SFRs associated with the four-level interrupt. They are
the IE, IP, and IPH. (See Figures 10, 11, and 12.) The IPH (Interrupt
Priority High) register makes the four-level interrupt structure
possible. The IPH is located at SFR address B7H. The structure of
the IPH register and a description of its bits is shown in Figure 12.
The function of the IPH SFR is simple and when combined with the
IP SFR determines the priority of each interrupt. The priority of each
interrupt is determined as shown in the following table:
PRIORITY BITS
INTERRUPT PRIORITY LEVEL
IPH.x
IP.x
0
0
Level 0 (lowest priority)
0
1
Level 1
1
0
Level 2
1
1
Level 3 (highest priority)
The priority scheme for servicing the interrupts is the same as that
for the 80C51, except there are four interrupt levels rather than two
as on the 80C51. An interrupt will be serviced as long as an interrupt
of equal or higher priority is not already being serviced. If an
interrupt of equal or higher level priority is being serviced, the new
interrupt will wait until it is finished before being serviced. If a lower
priority level interrupt is being serviced, it will be stopped and the
new interrupt serviced. When the new interrupt is finished, the lower
priority level interrupt that was stopped will be completed.
Table 8.
Interrupt Table
SOURCE
POLLING PRIORITY
REQUEST BITS
HARDWARE CLEAR
N (L)
1
VECTOR ADDRESS
X0
1
IE0
Y (T)
2
03H
T0
2
TF0
Y
0B
X1
3
IE1
N (L)
Y (T)
13
T1
4
TF1
Y
1B
PCA
5
CF, CCFn
n = 0–4
N
33
SP
6
RI, TI
N
23
T2
7
TF2, EXF2
N
2B
NOTES:
1. L = Level activated
2. T = Transition activated
EX0
IE (0A8H)
Enable Bit = 1 enables the interrupt.
Enable Bit = 0 disables it.
BIT
IE.7
SYMBOL
EA
FUNCTION
Global disable bit. If EA = 0, all interrupts are disabled. If EA = 1, each interrupt can be individually
enabled or disabled by setting or clearing its enable bit.
PCA interrupt enable bit for FX and RX+ only – not implemented otherwise.
Timer 2 interrupt enable bit.
Serial Port interrupt enable bit.
Timer 1 interrupt enable bit.
External interrupt 1 enable bit.
Timer 0 interrupt enable bit.
External interrupt 0 enable bit.
IE.6
IE.5
IE.4
IE.3
IE.2
IE.1
IE.0
EC
ET2
ES
ET1
EX1
ET0
EX0
SU00840
ET0
EX1
ET1
ES
ET2
EC
EA
0
1
2
3
4
5
6
7
Figure 10. IE Registers
相關(guān)PDF資料
PDF描述
8XC51FC 8-bit CMOS (low voltage, low power and high speed) microcontroller families
8XC51RD 8-bit CMOS (low voltage, low power and high speed) microcontroller families
8XC80C32 8-bit CMOS (low voltage, low power and high speed) microcontroller families
8XC51FB Low power single card reader
8XC51 CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
8XC51FA/FB/FC/80C51FA 制造商:未知廠家 制造商全稱:未知廠家 功能描述:(360.35 k)
8XC51FB 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Low power single card reader
8XC51FC 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit CMOS (low voltage, low power and high speed) microcontroller families
8XC51FX 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLERS
8XC51GB 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
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