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參數(shù)資料
| 型號： | 853054AL |
| 英文描述： | 4:1, DIFFERENTIAL-TO-3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER |
| 中文描述： | 4:1，差分至3.3V或2.5V的LVPECL / ECL時(shí)鐘復(fù)用器 |
| 文件頁數(shù)： | 12/15頁 |
| 文件大小： | 207K |
| 代理商： | 853054AL |
Integrated
Circuit
Systems, Inc.
853054AG
www.icst.com/products/hiperclocks.html
REV. A JANUARY 5, 2006
12
ICS853054
4:1, D
IFFERENTIAL
-
TO
-3.3V
OR
2.5V
LVPECL/ECL C
LOCK
M
ULTIPLEXER
PRELIMINARY
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in
Figure 5.
T
o calculate worst case power dissipation into the load, use the following equations which assume a 50
Ω
load, and a termination
voltage of V
CC
- 2V.
For logic high, V
OUT
= V
OH_MAX
=
V
CC_MAX
– 1.005V
(V
CC_MAX
- V
OH_MAX
) =
1.005
For logic low, V
OUT
= V
OL_MAX
=
V
CC_MAX
– 1.78V
(V
CC_MAX
- V
OL_MAX
) =
1.78V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CC_MAX
- 2V))/R
[(2V - 1.005V)/50
Ω
] * 1.005V =
20mW
] * (V
CC_MAX
- V
OH_MAX
) = [(2V - (V
CC_MAX
- V
OH_MAX
))/R
L
] * (V
CC_MAX
- V
OH_MAX
) =
Pd_L = [(V
OL_MAX
– (V
CC_MAX
- 2V))/R
[(2V - 1.78V)/50
Ω
] * 1.78V =
7.83mW
] * (V
CC_MAX
- V
OL_MAX
) = [(2V - (V
CC_MAX
- V
OL_MAX
))/R
L
] * (V
CC_MAX
- V
OL_MAX
) =
Total Power Dissipation per output pair = Pd_H + Pd_L =
27.83mW
F
IGURE
5. LVPECL D
RIVER
C
IRCUIT
AND
T
ERMINATION
VOUT
Q1
VCC - 2V
RL
50
VCC
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