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參數(shù)資料
| 型號： | 74AC139SJX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 2-To-4-Line Demultiplexer |
| 中文描述： | AC SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16 |
| 封裝： | 5.30 MM, EIAJ TYPE2, SOIC-16 |
| 文件頁數(shù)： | 2/9頁 |
| 文件大小： | 98K |
| 代理商： | 74AC139SJX |
www.fairchildsemi.com
2
7
Logic Symbols
IEEE/IEC
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Functional Description
The AC/ACT139 is a high-speed dual 1-of-4 decoder/
demultiplexer. The device has two independent decoders,
each of which accepts two binary weighted inputs (A
0
–
A
1
)
and provides four mutually exclusive active-LOW outputs
(O
0
–
O
3
). Each decoder has an active-LOW enable (E).
When E is HIGH all outputs are forced HIGH. The enable
can be used as the data input for a 4-output demultiplexer
application. Each half of the AC/ACT139 generates all four
minterms of two variables. These four minterms are useful
in some applications, replacing multiple gate functions as
shown in Figure 1, and thereby reducing the number of
packages required in a logic network.
FIGURE 1. Gate Functions (Each Half)
Logic Diagram
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
Inputs
Outputs
E
A
0
A
1
O
0
O
1
O
2
O
3
H
X
X
H
H
H
H
L
L
L
L
H
H
H
L
H
L
H
L
H
H
L
L
H
H
H
L
H
L
H
H
H
H
H
L
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