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參數(shù)資料
| 型號： | 409MLF |
| 英文描述： | PC PERIPHERAL CLOCK |
| 中文描述： | 電腦外設(shè)時鐘 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 105K |
| 代理商： | 409MLF |
PC P
ERIPHERAL
C
LOCK
MDS 409 C
2
Revision 111005
Integrated Circuit Systems
l
525 Race Street, San Jose, CA 95126
l
tel (408) 297-1201
l
www.icst.com
ICS409
Pin Assignment
40/80M Frequency Selection
Note: See below for operations of frequency selection
Pin Descriptions
External Components
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50
trace (a
commonly used trace impedance), place a 33
resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20
.
Decoupling Capacitor
As with any high performance mixed-signal IC, the
ICS409 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01μF must be connected
between VDD and the PCB ground plane.
Crystal Load Capacitors
The device crystal connections should include pads for
small capacitors from X1 to ground and from X2 to
ground. These capacitors are used to adjust the stray
capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming
process, it is important to keep stray capacitance to a
minimum by using very short PCB traces (and no vias)
been the crystal and device. Crystal capacitors must be
connected from each of the pins X1 and X1 to ground.
The value (in pF) of these crystal caps should equal
(C
L
-6pF)*2. In this equation, C
L
= crystal load
capacitance in pF. Example: For a crystal with a 15 pF
1
2
3
O E / L AT
4
G N D
4 0 / 8 0 M
2 5 M
2 5 M
X 2
V D D
8
7
6
5
X 1
8 Pin (150 mil) S OIC
40/80M (pin 5)
Output Freq
0
1
40M
80M
Pin
Number
1
2
3
4
5
Pin
Name
OE/LAT
X1
X2
VDD
40/80M
Pin
Type
Input
Input
Input
Power
Input/
Output
Power
Output
Output
Pin Description
Disables or latches 40/80 MHz output dependant on pin 5 level.
Crystal connection. Connect to 14.31818 MHz parallel mode crystal.
Crystal connection. Connect to 14.31818 MHz parallel mode crystal.
Connect to voltage supply.
40M or 80M selection pin and clock output (see below for operation).
Tri-state when OE/LAT is low.
Connect to ground.
25 MHz clock output.
25 MHz clock output.
6
7
8
GND
25M
25M
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