
PRELIMINARY
1.28 Gbit SDRAM
3DSD1280-323H
1.28 GBit Synchronous DRAM - Hermetic package
3D PLUS
, 641 rue Hélène Boucher - ZI
F-78532 BUC Cedex FRANCE
Tel : 33 (0)1 30 83 26 50 FAX : 33 (0)1 39 56 25 89
Web : http://www. 3d-plus.com
3DFP-0008
Rev : 2
December 1999
Page 1/2
ELECTRONICS
Pin Description
DQ0-DQ31
Data Inputs/Outputs
A0-A12*
Address
CAS#
Column Address Select
RAS#
Row Address Select
WE#
Write Enable
BS0,BS1
Bank Address Input
CLK
Clock
CKE
Clock Enable
DQM
Input/Output Mask
Vcc
Power (+3.3v)
NC
No Connection
GND
Ground
CS0# - CS9#
Chip Select
Pin configuration for
3DSD1024-0863S
Vcc
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
Vcc
NC
GND
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
GND
V
N
C
W
C
R
C
C
C
V
N
G
C
C
C
C
C
C
C
C
G
GND
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
GND
NC
Vcc
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
Vcc
43
G
N
D
B
B
A
A
A
A
G
N
V
A
A
A
A
A
A
A
A
V
1
21
22
42
63
64
84
* : A12 is a provision for 256Mb components extension
TOP VIEW
Features
Organized as 40M x 32-bit.
Single +3.3V ±0.3V power supply
Two stacks of ten 64 MBit SDRAM mounted
on ceramic hermetic package
Fully synchronous; all signals registered on
positive edge of system clock.
Internal pipelined operation; column address
can be changed every clock cycle.
Programmable burst lengths: 1, 2, 4, 8 or full
page.
Auto Precharge, includes Concurrent Auto
Precharge, and Auto Refresh Modes.
Self Refresh Mode
LVTTL - compatible inputs and outputs
Vcc and Vss are decoupled with four 10nF
and four 100nF capacitors inside the module
MIL-STD-883D Class S screening -
temperature range : -15°C to +80°
General Description
The 3DSD1280-323H is a highly integrated Synchro-
nous Dynamic Random Access Memory ceramic mo-
dule, containing 1,342,177,280 bits. It is organized
with ten banks of 128 Mbit. Each Bank has a 32-bit in-
terface, and is selected with specific CS#. All other si-
gnals are common to the twenty 64 MBit SDRAM
memories.
It is particularly well suited for use in high performance
and high density aerospace applications, such as solid
state recorder for airbornes and satellites.
The 3DSD1280-323H is packaged in a 84-pin CQFJ.
DQ[0...15]
A[0...11]
BS1
A12/NC
GND
DQ[0...15]
GND
VCC
BS1
DQ[0...15]
A[0...11]
BS1
A12/NC
GND
VCC
VCC
CLK
CAS
WE
CS[0...9]
CKE
LDQM
CLK
WE
CS[0...9]
LDQM
CLK
WE
CKE
DQM
Block Diagram